Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance. - Atsushi Kurokawa; Masanori Hashimoto; Akira Kasebe; Zhangcai Huang; Yun Yang; Yasuaki Inoue; Ryosuke Inagaki; Hiroo Masuda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

A PN Junction-Current Model for Advanced MOSFET Technologies. - Ryosuke Inagaki; Norio Sadachika; Mitiko Miura-Mattausch; Yasuaki Inoue (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

A GIDL-Current Model for Advanced MOSFET Technologies without Binning. - Ryosuke Inagaki; Norio Sadachika; Dondee Navarro; Mitiko Miura-Mattausch; Yasuaki Inoue (IPSJ Trans. Syst. LSI Des. Methodol., 2009)

Efficient algorithms for subdominant cycle-complete cost functions and cycle-complete solutions. - Kazutoshi Ando; Ryosuke Inagaki; Kazuya Shoji (Discret. Appl. Math., 2017)