Performance tuning and analysis of future vector processors based on the roofline model. - Yoshiei Sato; Ryu-ichi Nagaoka; Akihiro Musa; Ryusuke Egawa; Hiroyuki Takizawa; Koki Okabe; Hiroaki Kobayashi (MEDEA@PACT, 2009)

Design and early evaluation of a 3-D die stacked chip multi-vector processor. - Ryusuke Egawa; Yusuke Funaya; Ryu-ichi Nagaoka; Akihiro Musa; Hiroyuki Takizawa; Hiroaki Kobayashi (3DIC, 2010)

Effects of 3-D stacked vector cache on energy consumption. - Ryusuke Egawa; Yusuke Funaya; Ryu-ichi Nagaoka; Yusuke Endo; Akihiro Musa; Hiroyuki Takizawa; Hiroaki Kobayashi (3DIC, 2011)