Custom VLSI Test System. - Ryozou Yoshino; Ryuichi Takagi (ITC, 1985)

A 250 MHz Shared-Resource VLSI Test System with High Pin Count and Memory Test Capability. - Shuji Kikuchi; Yoshihiko Hayashi; Takashi Matsumoto; Ryozou Yoshino; Ryuichi Takagi (ITC, 1989)