Migrating from planar to FinFET for further CMOS scaling: SOI or bulk? - Thomas Chiarella; Liesbeth Witters; Abdelkarim Mercha; Christoph Kerner; Rok Dittrich; Michal Rakowski; Claude Ortolland; Lars-Åke Ragnarsson; Bertrand Parvais; An De Keersgieter; Stefan Kubicek; Augusto Redolfi; et al. (ESSCIRC, 2009)

WS2 transistors on 300 mm wafers with BEOL compatibility. - Tom Schram; Quentin Smets; Benjamin Groven; M. H. Heyne; E. Kunnen; A. Thiam; Katia Devriendt; Annelies Delabie; Dennis Lin; M. Lux; Daniele Chiappe; I. Asselberghs; et al. (ESSDERC, 2017)

Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFET. - Hiroaki Arimura; S. Brus; Jacopo Franco; Yusuke Oniki; A. Vandooren; T. Conard; B. T. Chan; B. Kannan; M. Samiee; W. Li; P. Deminskyi; E. Shero; et al. (VLSI Technology and Circuits, 2023)

Novel Low Thermal Budget CMOS RMG: Performance and Reliability Benchmark Against Conventional High Thermal Budget Gate Stack Solutions. - Jacopo Franco; Hiroaki Arimura; J.-F. de Marneffe; S. Brus; Romain Ritzenthaler; E. Dentoni Litta; Kris Croes; Ben Kaczer; N. Horiguchi (VLSI Technology and Circuits, 2023)

Vt Fine-Tuning in Multi-Vt Gate-All-Around Nanosheet nFETs Using Rare-Earth Oxide-Based Dipole-First Gate Stack Compatible with CFET Integration. - Hiroaki Arimura; Hans Mertens; Jacopo Franco; L. Lukose; W. Maqsood; S. Brus; Thomas Chiarella; A. Impagnatiello; S. Homkar; V. K. Mootheri; C. Yin; G. Alessio Verni; et al. (VLSI Technology and Circuits, 2024)

DRAM-Peri FinFET - A Thermally-Stable High-Performance Advanced CMOS RMG Platform with Mo-Based pWFM for sub-10nm DRAM. - J. Ganguly; Hiroaki Arimura; Romain Ritzenthaler; H. Bana; J. W. Maes; J. G. Lai; S. Brus; W. Maqsood; R. Sarkar; B. Kannan; Elena Capogreco; V. Machkaoutsan; et al. (VLSI Technology and Circuits, 2024)