S. Couet

Orcid: 0000-0001-6436-9593

According to our database1, S. Couet authored at least 22 papers between 2018 and 2024.

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Bibliography

2024
Spintronic logic: from transducers to logic gates and circuits.
CoRR, 2024

2023
Magnetic Coupling Based Test Development for Contact and Interconnect Defects in STT-MRAMs.
Proceedings of the IEEE International Test Conference, 2023

MTJ degradation in multi-pillar SOT-MRAM with selective writing.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

Spin-orbit torque MRAM for ultrafast cache and neuromorphic computing applications.
Proceedings of the IEEE International Memory Workshop, 2023

NPN Si/SiGe memory selector with non-linearity>10<sup>5</sup> and ON-current>6MA/cm<sup>2</sup>.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

Magnetic Domain Wall Memory: A DTCO study for Memory Applications.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

STT-MRAM Stochastic and Defects-aware DTCO for Last Level Cache at Advanced Process Nodes.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

Device-Aware Test for Back-Hopping Defects in STT-MRAMs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Device Aware Diagnosis for Unique Defects in STT-MRAMs.
Proceedings of the 32nd IEEE Asian Test Symposium, 2023

2022
Challenges and targets of MRAM-enabled scaled spintronic logic circuits.
CoRR, 2022

Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Degradation mechanism of amorphous IGZO-based bipolar metal-semiconductor-metal selectors.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

MTJ degradation in SOT-MRAM by self-heating-induced diffusion.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021

Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application.
Proceedings of the IEEE International Memory Workshop, 2021

2020
Understanding and empirical fitting the breakdown of MgO in end-of-line annealed MTJs.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Pinhole Defect Characterization and Fault Modeling for STT-MRAM Testing.
Proceedings of the 24th IEEE European Test Symposium, 2019

2018
SOT-MRAM 300mm integration for low power and ultrafast embedded memories.
CoRR, 2018

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdown.
Proceedings of the IEEE International Reliability Physics Symposium, 2018


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