24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit. - Taejoong Song; Woojin Rim; Hoonki Kim; Keun Hwi Cho; Taeyeong Kim; Taejung Lee; Geumjong Bae; Dong-Won Kim; S. D. Kwon; Sanghoon Baek; Jonghoon Jung; Jongwook Kye; et al. (ISSCC, 2021)

Comprehensive Feasibility Study of Single FIN Transistors for Scaling Both Switching Energy and Device Footprint. - H. Fukutome; K. Suh; W. Kim; Y. Moriyama; S. Kang; B. Eom; J. Kim; C. Yoon; W. Kwon; Y. Chung; Y. Nam; Y. Kim; et al. (VLSI Technology and Circuits, 2022)