Steven Demuynck

According to our database1, Steven Demuynck authored at least 8 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022

2020
Conduction and Breakdown Mechanisms in Low-k Spacer and Nitride Spacer Dielectric Stacks in Middle of Line Interconnects.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Role of Defects in the Reliability of HfO2/Si-Based Spacer Dielectric Stacks for Local Interconnects.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

2018
New methodology for modelling MOL TDDB coping with variability.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

2016

2015
Intrinsic reliability of local interconnects for N7 and beyond.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

2014
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies.
Proceedings of the 44th European Solid State Device Research Conference, 2014


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