Generation of Cancelable Iris Template Using Bi-level Transformation. - P. Punithavathi; S. Geetha 002; S. Sasikala (ICBBS, 2017)

High Speed Error Tolerant Adder for Multimedia Applications. - S. Geetha 002; P. Amritvalli (J. Electron. Test., 2017)

Design of High Speed Error Tolerant Adder Using Gate Diffusion Input Technique. - S. Geetha 002; P. Amritvalli (J. Electron. Test., 2019)