Reliable Sub-nanosecond MRAM with Double Spin-torque Magnetic Tunnel Junctions. - C. Safranski; Guohan Hu; J. Z. Sun; P. Hashemi; S. L. Brown; L. Buzi; C. P. D'Emic; E. R. J. Edwards; Eileen A. Galligan; M. G. Gottwald; O. Gunawan; S. Karimeddiny; et al. (VLSI Technology and Circuits, 2022)

First Demonstration of High Retention Energy Barriers and 2 ns Switching, Using Magnetic Ordered-Alloy-Based STT MRAM Devices. - M. G. Gottwald; Guohan Hu; Philip Louis Trouilloud; L. Rehm; C. Safranski; G. Kim; S. L. Brown; J. Bruley; C. P. D'Emic; O. Gunawan; H. Jung; C. Lavoie; et al. (VLSI Technology and Circuits, 2024)