Design of Low Power 5-Bit Hybrid Flash ADC. - S. M. Mayur; Siddharth R. K.; Kumar Y. B. Nithin; M. H. Vasantha (ISVLSI, 2016)

Design of Low Power 4-Bit 400MS/s Standard Cell Based Flash ADC. - S. M. Mayur; Siddharth R. K.; Kumar Y. B. Nithin; M. H. Vasantha (ISVLSI, 2017)