Transistor Reliability Characterization for Advanced DRAM with HK+MG & EUV process technology. - Nam-Hyun Lee; Sunhang Lee; S.-H. Kim; G.-J. Kim; K. W. Lee; Y. S. Lee; Y. C. Hwang; H. S. Kim; S. Pae (IRPS, 2022)

Reliability Characterization of HBM featuring $ text{HK}+ text{MG}$ Logic Chip with Multi-stacked DRAMs. - Sungmock Ha; S. Lee; G. H. Bae; D. S. Lee; S. H. Kim; B. W. Woo; N.-H. Lee; Y. S. Lee; S. Pae (IRPS, 2023)

Development and Product Reliability Characterization of Advanced High Speed 14nm DDR5 DRAM with On-die ECC. - S. Lee; N.-H. Lee; K. W. Lee; J. H. Kim; J. H. Jin; Y. S. Lee; Y. C. Hwang; H. S. Kim; S. Pae (IRPS, 2023)

Reliability Improvement with Optimized BEOL Process in Advanced DRAM. - J. H. Lee; B. W. Woo; Y. M. Lee; N. H. Lee; S. H. Lee; Y. S. Lee; H. S. Kim; S. Pae (IRPS, 2023)

Thermo-Mechanical Reliability Characteristics of 8H HBM3. - Jinsoo Bae; H. G. Noh; S. J. Yoo; I. J. Choi; G. H. Bae; Y. M. Shim; S. G. Lee; H. Jang; S. M. Lee; G. H. Chang; K. S. Kwon; C. B. Yoon; et al. (IRPS, 2024)

Effect of Off-State Stress on Data-Valid Window Margin for Advanced DRAM Using HK/MG Process Technology. - Sunhang Lee; Nam-Hyun Lee; G.-J. Kim; J. Ahn; Ik-Hwan Kim; S. Ha; S. Rhee; GH Bae; KW Lee; YS Lee; SB. Ko; S. Pae (IRPS, 2024)

A Critical Investigation of Hot Carrier Degradation in Low VTNMOSFETs in DRAM. - N. Choudhury; S. Lee; D. Son; G. Yang; G.-J. Kim; N.-H. Lee; Y. C. Hwang; SB. Ko; S. Pae (IRPS, 2025)

Novel Linear Model for OFF-State Stress Causing Stand-By Current of Advanced VNAND Chip. - H. Park; G.-J. Kim; N.-J. Kim; J. Ahn; T. You; Y. Kang; M. Yoon; S. Lee; N.-H. Lee; S. Hwang; YC Hwang; SB. Ko; et al. (IRPS, 2025)