A microprocessor based tea dryer controller. - S. S. S. P. Rao; Vinod K. Agarwal (SIGSMALL, 1980)

Microprogrammable peripheral controller. - S. S. S. P. Rao; T. Pradhan (Microprocess. Microsystems, 1982)

Performance monitoring of the EC - 1030 system by a microprocessor - based monitor. - S. S. S. P. Rao; L. S. Radhakrishnan; S. V. Shukla (Microprocess. Microsystems, 1982)

GKS implementation: A case study. - Shishir Pardikar; Mahesh Vaidya; S. S. S. P. Rao (Comput. Graph., 1987)

Modular approach to colour graphics system design: hardware aspects. - Rajesh K. Nemani; S. S. S. P. Rao (Microprocess. Microsystems, 1987)

Interface Optimization: An Algorithm for the Detection of Data Path Redundancy and Reconfigurability Towards Obtaining Minimal Bus Interfaces. - S. S. S. P. Rao; J. R. Isaac (IEEE Trans. Computers, 1989)

An Over-the-Cell Channel Router. - Ravi R. Pai; S. S. S. P. Rao (VLSI, 1991)

PLX: A proposal to implement a general broadcasting facility in a distributed environment running X windows. - Y. Z. Lashkari; S. S. S. P. Rao; V. Y. Mhaskar; A. C. Shelat (Comput. Graph., 1992)

Impact of Delays in Parallel I/O System: An Empirical Study. - C. R. Venugopal; S. S. S. P. Rao (HPDC, 1996)

FPGA Implementation of Median Filter. - R. Maheshwari; S. S. S. P. Rao; E. G. Poonach (VLSI Design, 1997)

Priority Scheduling in Parallel I/O Systems. - C. R. Venugopal; S. S. S. P. Rao; Sachin B. Patkar (PDPTA, 1999)

Parallel File System on Networked Intel Workstation. - K. Baswaraj; S. Deepalakshmi; S. S. S. P. Rao; B. S. Jagdish; P. S. Dhekne; H. K. Kaura (PDPTA, 2002)

Programming Process Control in Embedded Systems. - Namit Chaturvedi; S. S. S. P. Rao; S. C. Patwardhan (Embedded Systems and Applications, 2003)

Parallelization By Pattern Matching. - K. Baswaraj; S. S. S. P. Rao; B. S. Jagdish; P. S. Dhekne; H. K. Kaura (PDPTA, 2003)

Performance Analysis of Parallel File System for I/O Load Balancing in Distributed Applications. - S. Deepalakshmi; K. Baswaraj; S. S. S. P. Rao; B. S. Jagdish; D. D. Sonavane; P. S. Dhekne; H. K. Kaura (PDPTA, 2003)

Power Reduction Technique Using Multi-vt Libraries. - Meeta Srivastav; S. S. S. P. Rao; Himanshu Bhatnagar (IWSOC, 2005)

Multiple Fault Testing of Logic Resources of SRAM-Based FPGAs. - Saurabh Goyal; Mihir R. Choudhury; S. S. S. P. Rao; L. Kalyan Kumar (VLSI Design, 2005)