Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse-Order Restoration and Test Relaxation. - Aiman H. El-Maleh; S. Saqib Khursheed; Sadiq M. Sait (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Resistive Bridging Faults DFT with Adaptive Power Management Awareness. - Urban Ingelsson; Paul M. Rosinger; S. Saqib Khursheed; Bashir M. Al-Hashimi; Peter Harrod (ATS, 2007)

Efficient test compaction for combinational circuits based on Fault detection count-directed clustering. - Aiman El-Maleh; S. Saqib Khursheed (IET Comput. Digit. Tech., 2007)

Bridge Defect Diagnosis for Multiple-Voltage Design. - S. Saqib Khursheed; Paul M. Rosinger; Bashir M. Al-Hashimi; Sudhakar M. Reddy; Peter Harrod (ETS, 2008)

Bridging Fault Test Method With Adaptive Power Management Awareness. - S. Saqib Khursheed; Urban Ingelsson; Paul M. Rosinger; Bashir M. Al-Hashimi; Peter Harrod (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing. - S. Saqib Khursheed; Bashir M. Al-Hashimi; Peter Harrod (DATE, 2009)

Process Variation-Aware Test for Resistive Bridges. - Urban Ingelsson; Bashir M. Al-Hashimi; S. Saqib Khursheed; Sudhakar M. Reddy; Peter Harrod (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Diagnosis of Multiple-Voltage Design With Bridge Defect. - S. Saqib Khursheed; Bashir M. Al-Hashimi; Sudhakar M. Reddy; Peter Harrod (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Scan based methodology for reliable state retention power gating designs. - Sheng Yang 003; Bashir M. Al-Hashimi; David Flynn; S. Saqib Khursheed (DATE, 2010)

Modeling the impact of process variation on resistive bridge defects. - S. Saqib Khursheed; Shida Zhong; Robert C. Aitken; Bashir M. Al-Hashimi; Sandip Kundu (ITC, 2010)

Gate-Sizing-Based Single Vdd Test for Bridge Defects in Multivoltage Designs. - S. Saqib Khursheed; Bashir M. Al-Hashimi; Krishnendu Chakrabarty; Peter Harrod (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Test and diagnosis of resistive bridges in multi-Vdd designs. - Syed Saqib Khursheed (2010)

Cost-Effective TSV Grouping for Yield Improvement of 3D-ICs. - Yi Zhao 001; S. Saqib Khursheed; Bashir M. Al-Hashimi (Asian Test Symposium, 2011)

Analysis of Resistive Bridge Defect Delay Behavior in the Presence of Process Variation. - Shida Zhong; S. Saqib Khursheed; Bashir M. Al-Hashimi; Sudhakar M. Reddy; Krishnendu Chakrabarty (Asian Test Symposium, 2011)

Improved DFT for Testing Power Switches. - S. Saqib Khursheed; Sheng Yang 003; Bashir M. Al-Hashimi; Xiaoyu Huang; David Flynn (ETS, 2011)

Reliable State Retention-Based Embedded Processors Through Monitoring and Recovery. - Sheng Yang 003; S. Saqib Khursheed; Bashir M. Al-Hashimi; David Flynn; Sachin Idgunji (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

A Fast and Accurate Process Variation-Aware Modeling Technique for Resistive Bridge Defects. - Shida Zhong; S. Saqib Khursheed; Bashir M. Al-Hashimi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Impact of PVT variation on delay test of resistive open and resistive bridge defects. - Shida Zhong; S. Saqib Khursheed; Bashir M. Al-Hashimi (DFTS, 2013)

Improved State Integrity of Flip-Flops for Voltage Scaled Retention Under PVT Variation. - Sheng Yang 003; S. Saqib Khursheed; Bashir M. Al-Hashimi; David Flynn; Geoff V. Merrett (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

High Quality Testing of Grid Style Power Gating. - Vasileios Tenentes; S. Saqib Khursheed; Bashir M. Al-Hashimi; Shida Zhong; Sheng Yang 003 (ATS, 2014)

Efficient Variation-Aware Delay Fault Simulation Methodology for Resistive Open and Bridge Defects. - Shida Zhong; S. Saqib Khursheed; Bashir M. Al-Hashimi; Wei Zhao (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Delay Test for Diagnosis of Power Switches. - S. Saqib Khursheed; Kan Shi; Bashir M. Al-Hashimi; Peter R. Wilson; Krishnendu Chakrabarty (IEEE Trans. Very Large Scale Integr. Syst., 2014)

NBTI and leakage aware sleep transistor design for reliable and energy efficient power gating. - Daniele Rossi 001; Vasileios Tenentes; S. Saqib Khursheed; Bashir M. Al-Hashimi (ETS, 2015)

Diagnosis of power switches with power-distribution-network consideration. - Vasileios Tenentes; Daniele Rossi 001; S. Saqib Khursheed; Bashir M. Al-Hashimi (ETS, 2015)

BTI and leakage aware dynamic voltage scaling for reliable low power cache memories. - Daniele Rossi 001; Vasileios Tenentes; S. Saqib Khursheed; Bashir M. Al-Hashimi (IOLTS, 2015)

Application-specific memory protection policies for energy-efficient reliable design. - Sheng Yang 003; Rishad A. Shafik; S. Saqib Khursheed; David Flynn; Geoff V. Merrett; Bashir M. Al-Hashimi (RSP, 2015)

DFT Architecture With Power-Distribution-Network Consideration for Delay-Based Power Gating Test. - Vasileios Tenentes; S. Saqib Khursheed; Daniele Rossi 001; Sheng Yang 003; Bashir M. Al-Hashimi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Online Fault Tolerance Technique for TSV-Based 3-D-IC. - Yi Zhao 001; S. Saqib Khursheed; Bashir M. Al-Hashimi (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Reconfigurable hardware-software codesign methodology for protein identification. - Venkateshwarlu Y. Gudur; Sandeep Thallada; Abhinay R. Deevi; Venkata Krishna Gande; Amit Acharyya; Vasundhra Bhandari; Paresh Sharma; S. Saqib Khursheed; Ganesh R. Naik (EMBC, 2016)

Co-optimization of fault tolerance, wirelength and temperature mitigation in TSV-based 3D ICs. - Yi Zhao 001; S. Saqib Khursheed; Bashir M. Al-Hashimi; Zhiwen Zhao (VLSI-SoC, 2016)

Guest Editors' Introduction: Robust 3-D Stacked ICs. - S. Saqib Khursheed; Pascal Vivet; Fabian Hopsch; Erik Jan Marinissen (IEEE Des. Test, 2016)

Reliable Power Gating With NBTI Aging Benefits. - Daniele Rossi 001; Vasileios Tenentes; Sheng Yang 003; S. Saqib Khursheed; Bashir M. Al-Hashimi (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Welcome Message. - Rishad A. Shafik; Qiaoyan Yu; S. Saqib Khursheed; Antonio Miele (DFT, 2017)

Improved Wire Length-Driven Placement Technique for Minimizing Wire Length, Area and Timing. - Srinivas Sabbavarapu; Basireddy Karunakar Reddy; Amit Acharyya; S. Saqib Khursheed (J. Low Power Electron., 2017)

Aging Benefits in Nanometer CMOS Designs. - Daniele Rossi 001; Vasileios Tenentes; Sheng Yang 003; Syed Saqib Khursheed; Bashir M. Al-Hashimi (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A Cost-Effective Fault Tolerance Technique for Functional TSV in 3-D ICs. - Raviteja P. Reddy; Amit Acharyya; S. Saqib Khursheed (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Coarse-Grained Online Monitoring of BTI Aging by Reusing Power-Gating Infrastructure. - Vasileios Tenentes; Daniele Rossi 001; Sheng Yang 003; S. Saqib Khursheed; Bashir M. Al-Hashimi; Steve R. Gunn (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Recycled IC detection through aging sensor. - Daniele Rossi 001; Vasileios Tenentes; S. Saqib Khursheed; Sudhakar M. Reddy (ETS, 2018)

Leakage Current Analysis for Diagnosis of Bridge Defects in Power-Gating Designs. - Vasileios Tenentes; Daniele Rossi 001; S. Saqib Khursheed; Bashir M. Al-Hashimi; Krishnendu Chakrabarty (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Fault Tolerance in 3D-ICs. - Raviteja P. Reddy; Amit Acharyya; S. Saqib Khursheed (Security and Fault Tolerance in Internet of Things, 2019)

A Framework for TSV Based 3D-IC to Analyze Aging and TSV Thermo-Mechanical Stress on Soft Errors. - Raviteja P. Reddy; Amit Acharyya; S. Saqib Khursheed (ITC-Asia, 2019)

Secure Scan Design with a Novel Methodology of Scan Camouflaging. - Srisubha Kalanadhabhatta; Kiran Kumar Anumandla; S. Saqib Khursheed; Amit Acharyya (ECCTD, 2020)

Leveraging CMOS Aging for Efficient Microelectronics Design. - Antonio Leonel Hernández Martínez; S. Saqib Khursheed; Daniele Rossi 001 (IOLTS, 2020)

LFSR generation for high test coverage and low hardware overhead. - Leonel Hernández Martínez; S. Saqib Khursheed; Sudhakar M. Reddy (IET Comput. Digit. Tech., 2020)

A Cost-Aware Framework for Lifetime Reliability of TSV-Based 3D-IC Design. - Raviteja P. Reddy; Amit Acharyya; S. Saqib Khursheed (IEEE Trans. Circuits Syst., 2020)

Differential Aging Sensor to Detect Recycled ICs using Sub-threshold Leakage Current. - Turki Alnuayri; S. Saqib Khursheed; Antonio Leonel Hernández Martínez; Daniele Rossi 001 (DATE, 2021)

An Exploration of Microprocessor Self-Test Optimisation Based On Safe Faults. - Anuraag Narang; Balaji Venn; S. Saqib Khursheed; Peter Harrod (DFT, 2021)

IC Age Estimation Methodology Using IO Pad Protection Diodes for Prevention of Recycled ICs. - Srisubha Kalanadhabhatta; Rashi Dutt; S. Saqib Khursheed; Amit Acharyya (ISCAS, 2021)

Differential Aging Sensor Using Subthreshold Leakage Current to Detect Recycled ICs. - Turki Alnuayri; S. Saqib Khursheed; Antonio Leonel Hernández Martínez; Daniele Rossi 001 (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Operational Age Estimation of ICs using Gaussian Process Regression. - Anmol Singh Narwariya; Pabitra Das; Saqib Khursheed; Amit Acharyya (DFT, 2022)

Online Remaining Useful Lifetime Prediction Using Support Vector Regression. - Antonio Leonel Hernández Martínez; Saqib Khursheed; Turki Alnuayri; Daniele Rossi 001 (IEEE Trans. Emerg. Top. Comput., 2022)

Hardware Trojan Detection on a PCB Through Differential Power Monitoring. - Gor Piliposyan; Saqib Khursheed; Daniele Rossi 001 (IEEE Trans. Emerg. Top. Comput., 2022)

PCB Hardware Trojan Run-Time Detection Through Machine Learning. - Gor Piliposyan; Saqib Khursheed (IEEE Trans. Computers, 2023)

On-Chip Age Estimation Using Machine Learning. - Turki Alnuayri; Saqib Khursheed; Daniele Rossi 001 (IEEE Access, 2025)

Noninvasive Methodology for the Age Estimation of ICs Using Gaussian Process Regression. - Anmol Singh Narwariya; Pabitra Das; Saqib Khursheed; Amit Acharyya (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)