The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices. - Abhitosh Vais; Koen Martens; Jacopo Franco; Dennis Lin; AliReza Alian; Philippe Roussel; S. Sioncke; Nadine Collaert; Aaron Thean; Marc M. Heyns; Guido Groeseneken; Kristin De Meyer (IRPS, 2015)

Beyond-Si materials and devices for more Moore and more than Moore applications. - Nadine Collaert; AliReza Alian; Hiroaki Arimura; Geert Boccardi; Geert Eneman; Jacopo Franco; Tsvetan Ivanov; Dennis Lin; Jérôme Mitard; S. Ramesh; R. Rooyackers; Marc Schaekers; et al. (ICICDT, 2016)

Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps. - Vamsi Putcha; Jacopo Franco; Abhitosh Vais; Ben Kaczer; S. Sioncke; Dimitri Linten; Guido Groeseneken (IRPS, 2018)