An Accelerator-based Architecture Utilizing an Efficient Memory Link for Modern Computational Requirements. - Saba Yousefzadeh; Katayoon Basharkhah; Nooshin Nosrati; Rezgar Sadeghi; Jaan Raik; Maksim Jenihhin; Zainalabedin Navabi (EWDTS, 2019)

Reconfiguration of Embedded Accelerators by Microprogramming for Intensive Loop Computations. - Saba Yousefzadeh; Katayoon Basharkhah; Nooshin Nosrati; Maryam Rajabalipanah; Seyedeh Maryam Ghasemi; Zainalabedin Navabi (DDECS, 2020)

Reducing DFT hardware overhead by use of a test microprogram in a microprogrammed hardware accelerator. - Maryam Rajabalipanah; Seyedeh Maryam Ghasemi; Nooshin Nosrati; Katayoon Basharkhah; Saba Yousefzadeh; Zainalabedin Navabi (DFT, 2020)

Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms. - Seyed Ahmad Mirsalari; Saba Yousefzadeh; Giuseppe Tagliavini; Dimitrios Stathis 001; Ahmed Hemani (ICECS, 2023)

Exploration of Custom Floating-Point Formats: A Systematic Approach. - Saba Yousefzadeh; Yu Yang; Astile Peter; Dimitrios Stathis 001; Ahmed Hemani (DSD, 2024)