An automated design methodology for yield aware analog circuit synthesis in submicron technology. - Sabyasachi Deyati; Pradip Mandal (ISQED, 2011)

Validation signature testing: A methodology for post-silicon validation of analog/mixed-signal circuits. - Abhijit Chatterjee; Sabyasachi Deyati; Barry John Muldrey; Shyam Kumar Devarakond; Aritra Banerjee (ICCAD, 2012)

Pilot symbol driven monitoring of electrical degradation in RF transmitter systems using model anomaly diagnosis. - Sabyasachi Deyati; Aritra Banerjee; Abhijit Chatterjee (IOLTS, 2012)

VAST: Post-Silicon VAlidation and Diagnosis of RF/Mixed-Signal Circuits Using Signature Tests. - Sabyasachi Deyati; Aritra Banerjee; Barry John Muldrey; Abhijit Chatterjee (VLSI Design, 2013)

RAVAGE: Post-silicon validation of mixed signal systems using genetic stimulus evolution and model tuning. - Barry John Muldrey; Sabyasachi Deyati; Michael Giardino; Abhijit Chatterjee (VTS, 2013)

High Resolution Pulse Propagation Driven Trojan Detection in Digital Logic: Optimization Algorithms and Infrastructure. - Sabyasachi Deyati; Barry John Muldrey; Adit D. Singh; Abhijit Chatterjee (ATS, 2014)

A reusable BIST with software assisted repair technology for improved memory and IO debug, validation and test time. - Bruce Querbach; Rahul Khanna; David Blankenbeckler; Yulan Zhang; Ronald T. Anderson; David G. Ellis; Zale T. Schoenborn; Sabyasachi Deyati; Patrick Chiang 001 (ITC, 2014)

Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits. - Sabyasachi Deyati; Barry John Muldrey; Aritra Banerjee; Abhijit Chatterjee (VTS, 2014)

Low Cost Signal Reconstruction Based Testing of RF Components using Incoherent Undersampling. - Debesh Bhatta; Aritra Banerjee; Sabyasachi Deyati; Nicholas Tzou; Abhijit Chatterjee (J. Electron. Test., 2014)

Challenge Engineering and Design of Analog Push Pull Amplifier Based Physically Unclonable Function for Hardware Security. - Sabyasachi Deyati; Barry John Muldrey; Adit D. Singh; Abhijit Chatterjee (ATS, 2015)

Concurrent Stimulus and Defect Magnitude Optimization for Detection of Weakest Shorts and Opens in Analog Circuits. - Barry John Muldrey; Sabyasachi Deyati; Abhijit Chatterjee (ATS, 2016)

Noise-Resilient SRAM Physically Unclonable Function Design for Security. - Sujay Pandey; Sabyasachi Deyati; Adit D. Singh; Abhijit Chatterjee (ATS, 2016)

Trojan detection in digital systems using current sensing of pulse propagation in logic gates. - Sabyasachi Deyati; Barry John Muldrey; Abhijit Chatterjee (ISQED, 2016)

DE-LOC: Design validation and debugging under limited observation and control, pre- and post-silicon for mixed-signal systems. - Barry John Muldrey; Sabyasachi Deyati; Abhijit Chatterjee (ITC, 2016)

TRAP: Test Generation Driven Classification of Analog/RF ICs Using Adaptive Probabilistic Clustering Algorithm. - Sabyasachi Deyati; Barry John Muldrey; Abhijit Chatterjee (VLSID, 2016)

Adaptive testing of analog/RF circuits using hardware extracted FSM models. - Sabyasachi Deyati; Barry John Muldrey; Abhijit Chatterjee (VTS, 2016)

BISCC: Efficient pre through post silicon validation of mixed-signal/RF systems using built in state consistency checking. - Sabyasachi Deyati; Barry John Muldrey; Abhijit Chatterjee (DATE, 2017)

Concurrent built in test and tuning of beamforming MIMO systems using learning assisted performance optimization. - Sabyasachi Deyati; Barry J. Muldrey; Byunghoo Jung; Abhijit Chatterjee (ITC, 2017)

Post-Silicon Validation: Automatic Characterization of RF Device Nonidealities via Iterative Learning Experiments on Hardware. - Barry John Muldrey; Sabyasachi Deyati; Abhijit Chatterjee (VLSID, 2017)

Scalable algorithms and design for debug hardware for test, validation and security of mixed signal/rf circuits and systems. - Sabyasachi Deyati (2017)

Dynamic Test Stimulus Adaptation for Analog/RF Circuits Using Booleanized Models Extracted From Hardware. - Sabyasachi Deyati; Barry J. Muldrey; Abhijit Chatterjee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

High Resolution Pulse Propagation Driven Trojan Detection in Digital Systems. - Sabyasachi Deyati; Barry J. Muldrey; Adit D. Singh; Abhijit Chatterjee (J. Electron. Test., 2021)

BISCC: A Novel Approach to Built In State Consistency Checking For Quick Volume Validation of Mixed-Signal/RF Systems. - Sabyasachi Deyati; Barry John Muldrey; Abhijit Chatterjee (J. Electron. Test., 2023)