Testability Improvement During High-Level Synthesis. - Saeed Safari; Hadi Esmaeilzadeh; Amir-Hossein Jahangir (Asian Test Symposium, 2003)

A novel improvement technique for high-level test synthesis. - Saeed Safari; Hadi Esmaeilzadeh; Amir-Hossein Jahangir (ISCAS (5), 2003)

A Novel Merged Multiplier-Accumulator Embedded in DSP Coprocessor. - Hadi Parandeh-Afshar; Mohsen Ahmadvand; Saeed Safari (ICECS, 2006)

An Intelligent MLFQ Scheduling Algorithm (IMLFQ) with Fault Tolerant Mechanism. - MohammadReza EffatParvar; Karim Faez; Mehdi EffatParvar; Mehdi Zarei; Saeed Safari (ISDA (3), 2006)

A parameterized graph-based framework for high-level test synthesis. - Saeed Safari; Amir-Hossein Jahangir; Hadi Esmaeilzadeh (Integr., 2006)

Improving Robustness of Real-Time Operating Systems (RTOS) Services Related to Soft-Errors. - Mohammad Hossein Neishaburi; Masoud Daneshtalab; Mohammad Reza Kakoee; Saeed Safari (AICCSA, 2007)

A HW/SW Architecture to Reduce the Effects of Soft-Errors in Real-Time Operating System Services. - Mohammad Hossein Neishaburi; Mohammad Reza Kakoee; Masoud Daneshtalab; Saeed Safari; Zainalabedin Navabi (DDECS, 2007)

Fault Tolerant Arithmetic Operations with Multiple Error Detection and Correction. - Mojtaba Valinataj; Saeed Safari (DFT, 2007)

On-Chip Verification of NoCs Using Assertion Processors. - Mohammad Reza Kakoee; Mohammad Hossein Neishaburi; Masoud Daneshtalab; Saeed Safari; Zainalabedin Navabi (DSD, 2007)

Co-evolutionary high-level test synthesis. - Soheil Aminzadeh; Saeed Safari (ACM Great Lakes Symposium on VLSI, 2007)

HW/SW partitioning using discrete particle swarm. - Amin Farmahini Farahani; Mehdi Kamal; Seid Mehdi Fakhraie; Saeed Safari (ACM Great Lakes Symposium on VLSI, 2007)

SOPC-Based Architecture for Discrete Particle Swarm Optimization. - Amin Farmahini Farahani; Sied Mehdi Fakhraie; Saeed Safari (ICECS, 2007)

Assertion based design error diagnosis for core-based SoCs. - Mohammad Reza Kakoee; Mohammad Hossein Neishaburi; Masoud Daneshtalab; Saeed Safari (SoCC, 2007)

15GHz low-voltage-swing carry-lookahead adder. - Fatemeh Kashfi; Amir Agah; Sied Mehdi Fakhraie; Saeed Safari (IEICE Electron. Express, 2007)

HW/SW architecture for soft-error cancellation in real-time operating system. - Mohammad Hossein Neishaburi; Mohammad Reza Kakoee; Masoud Daneshtalab; Saeed Safari (IEICE Electron. Express, 2007)

Scalable Architecture for on-Chip Neural Network Training using Swarm Intelligence. - Amin Farmahini Farahani; Seid Mehdi Fakhraie; Saeed Safari (DATE, 2008)

A Novel GA-Based High-Level Synthesis Technique to Enhance RT-Level Concurrent Testing. - Naghmeh Karimi; Soheil Aminzadeh; Saeed Safari; Zainalabedin Navabi (IOLTS, 2008)

Reliability in Application Specific Mesh-Based NoC Architectures. - Fatemeh Refan; Homa Alemzadeh; Saeed Safari; Paolo Prinetto; Zainalabedin Navabi (IOLTS, 2008)

A 65nm 10GHz pipelined MAC structure. - Fatemeh Kashfi; Sied Mehdi Fakhraie; Saeed Safari (ISCAS, 2008)

Co-evolutionary reliability-oriented high-level synthesis. - Saeed Safari (ISCAS, 2008)

Inherent reliability evaluation of Networks-on-Chip based on analytical models. - Mojtaba Valinataj; Siamak Mohammadi; Saeed Safari (SoC, 2008)

Designing an ultra-high-speed multiply-accumulate structure. - Fatemeh Kashfi; Sied Mehdi Fakhraie; Saeed Safari (Microelectron. J., 2008)

A cost-error optimized architecture for 9/7 lifting based Discrete Wavelet Transform with balanced pipeline stages. - Alireza Aminlou; Fatemeh Refan; Mahmoud Reza Hashemi; Omid Fatemi; Saeed Safari (ICASSP, 2009)

Real-Time Parallel Implementation of SSD Stereo Vision Algorithm on CSX SIMD Architecture. - Fouzhan Hosseini; Amir Fijany; Saeed Safari; Ryad Chellali; Jean-Guy Fontaine (ISVC (1), 2009)

Forecasting-Based Dynamic Virtual Channels Allocation for Power Optimization of Network-on-Chips. - Amir-Mohammad Rahmani; Masoud Daneshtalab; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram (VLSI Design, 2009)

Negative Exponential Distribution Traffic Pattern for Power/Performance Analysis of Network on Chips. - Amir-Mohammad Rahmani; I. Kamali; Pejman Lotfi-Kamran; Ali Afzali-Kusha; Saeed Safari (VLSI Design, 2009)

Automatic selection of efficient observability points in combinational gate level circuits using particle swarm optimization. - Amirali Ghofrani; Fatemeh Javaheri; Saeed Safari; Zainalabedin Navabi (SoC, 2010)

Fast Parallel Model Estimation on the Cell Broadband Engine. - Ali Khalili; Amir Fijany; Fouzhan Hosseini; Saeed Safari; Jean-Guy Fontaine (ISVC (2), 2010)

Reliability-Aware Dynamic Voltage and Frequency Scaling. - Farshad Firouzi; Mostafa E. Salehi; Fan Wang; Sied Mehdi Fakhraie; Saeed Safari (ISVLSI, 2010)

Parallel scalable hardware implementation of asynchronous discrete particle swarm optimization. - Amin Farmahini Farahani; Shervin Vakili; Sied Mehdi Fakhraie; Saeed Safari; Caro Lucas (Eng. Appl. Artif. Intell., 2010)

Securing Embedded Processors against Power Analysis Based Side Channel Attacks Using Reconfigurable Architecture. - Sahar Abbaspour Seyyedi; Mehdi Kamal; Hamid Noori; Saeed Safari (EUC, 2011)

An architecture-level approach for mitigating the impact of process variations on extensible processors. - Mehdi Kamal; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram (DATE, 2012)

Power constraint testing for multi-clock domain SoCs using concurrent hybrid BIST. - M. H. Haghbayan; Saeed Safari; Zainalabedin Navabi (DDECS, 2012)

Soft Error Analysis on Communication Channels in On-Chip Communication Networks. - Mohammadreza Najafi; Saeed Safari; Zainalabedin Navabi (DSD, 2012)

A novel graceful degradable routing algorithm for 3D on-chip networks. - Reza Nakhjavani; Ali Shahabi; Saeed Safari; Zainalabedin Navabi (INA-OCMC@HiPEAC, 2012)

An efficient reliability simulation flow for evaluating the hot carrier injection effect in CMOS VLSI circuits. - Mehdi Kamal; Qing Xie 001; Massoud Pedram; Ali Afzali-Kusha; Saeed Safari (ICCD, 2012)

FPGA Implementation of a Cortical Network Based on the Hodgkin-Huxley Neuron Model. - Safa Yaghini Bonabi; Hassan Asgharian; Reyhaneh Bakhtiari; Saeed Safari; Majid Nili Ahmadabadi (ICONIP (1), 2012)

FPGA Implementation of Hodgkin-Huxley Neuron Model. - Safa Yaghini Bonabi; Hassan Asgharian; Reyhaneh Bakhtiari; Saeed Safari; Majid Nili Ahmadabadi (IJCCI, 2012)

Architectural vulnerability aware checkpoint placement in a multicore processor. - Atieh Lotfi; Arash Bayat; Saeed Safari (IOLTS, 2012)

DEED: Dynamic energy efficient distributed cluster forming algorithm for Wireless Sensors Network. - Muhammad Amin Araghizadeh; Nasser Yazdani; Saeed Safari; Alireza Hedayati 001 (IST, 2012)

Reliability-aware cross-layer custom instruction screening. - Bahareh J. Farahani; Ali Azarpeyvand; Saeed Safari; Seid Mehdi Fakhraie (DDECS, 2013)

Capturing and mitigating the NBTI effect during the design flow for extensible processors. - Mehdi Kamal; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram; Behzad Eghbalkhah (DTIS, 2013)

Performance evaluation of normaly-off SiC JFET in matrix converter without antiparrallel diodes. - Saeed Safari; Alberto Castellazzi; Pat Wheeler (IECON, 2013)

Fast implementation of dense stereo vision algorithms on a highly parallel SIMD architecture. - Fouzhan Hosseini; Amir Fijany; Saeed Safari; Jean-Guy Fontaine (J. Real Time Image Process., 2013)

Considering the effect of process variations during the ISA extension design flow. - Mehdi Kamal; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram (Microprocess. Microsystems, 2013)

An instance-based SER analysis in the presence of PVTA variations. - Bahareh J. Farahani; Saeed Safari (DFT, 2014)

Formal Verification and Debugging of Array Dividers with Auto-correction Mechanism. - M. H. Haghbayan; Bijan Alizadeh; Payman Behnam; Saeed Safari (VLSID, 2014)

Impact of Process Variations on Speedup and Maximum Achievable Frequency of Extensible Processors. - Mehdi Kamal; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram (ACM J. Emerg. Technol. Comput. Syst., 2014)

Implementation-aware selection of the custom instruction set for extensible processors. - Amir Yazdanbakhsh; Mehdi Kamal; Sied Mehdi Fakhraie; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram (Microprocess. Microsystems, 2014)

A cross-layer approach to online adaptive reliability prediction of transient faults. - Bahar J. Farahani; Saeed Safari (DFTS, 2015)

Reliability-aware simultaneous multithreaded architecture using online architectural vulnerability factor estimation. - Fatemeh Pouyan; Ali Azarpeyvand; Saeed Safari; Sied Mehdi Fakhraie (IET Comput. Digit. Tech., 2015)

Design of NBTI-resilient extensible processors. - Mehdi Kamal; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram (Integr., 2015)

A cross-layer SER analysis in the presence of PVTA variations. - Bahar J. Farahani; Seyedamin Habibi; Saeed Safari (Microelectron. Reliab., 2015)

Cross-layer custom instruction selection to address PVTA variations and soft error. - Bahareh J. Farahani; Saeed Safari (Microelectron. Reliab., 2015)

OPLE: A Heuristic Custom Instruction Selection Algorithm Based on Partitioning and Local Exploration of Application Dataflow Graphs. - Mehdi Kamal; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram (ACM Trans. Embed. Comput. Syst., 2015)

SEERAD: A high speed yet energy-efficient rounding-based approximate divider. - Reza Zendegani; Mehdi Kamal; Arash Fayyazi; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram (DATE, 2016)

Reliability-Aware Task Scheduling using Clustered Replication for Multi-core Real-Time systems. - Alireza Namazi; Meisam Abdollahi; Saeed Safari; Siamak Mohammadi; Masoud Daneshtalab (NoCArc@MICRO, 2016)

An efficient medium access control protocol for WSN-UAV. - Muhammad Amin Araghizadeh; Peyman Teymoori; Nasser Yazdani; Saeed Safari (Ad Hoc Networks, 2016)

Fast and accurate FPGA-based framework for processor architecture vulnerability analysis. - Hoda Mahdiani; Saeed Safari; Mostafa E. Salehi (Integr., 2016)

Statistical analysis of asynchronous pipelines in presence of process variation using formal models. - Mahdi Mosaffa; Siamak Mohammadi; Saeed Safari (Integr., 2016)

Fast and accurate architectural vulnerability analysis for embedded processors using Instruction Vulnerability Factor. - Ali Azarpeyvand; Mostafa E. Salehi; Seid Mehdi Fakhraie; Saeed Safari (Microprocess. Microsystems, 2016)

PVTA-aware approximate custom instruction extension technique: A cross-layer approach. - Bahareh J. Farahani; Saeed Safari; Nader Sehatbakhsh (Microelectron. Reliab., 2016)

An efficient temperature dependent hot carrier injection reliability simulation flow. - Mehdi Kamal; Qing Xie 001; Massoud Pedram; Ali Afzali-Kusha; Saeed Safari (Microelectron. Reliab., 2016)

Reliability aware throughput management of chip multi-processor architecture via thread migration. - Fatemeh Pouyan; Ali Azarpeyvand; Saeed Safari; Sied Mehdi Fakhraie (J. Supercomput., 2016)

Yield and Speedup Improvements in Extensible Processors by Allocating Extra Cycles to Some Custom Instructions. - Mehdi Kamal; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram (ACM Trans. Design Autom. Electr. Syst., 2016)

LORAP: Low-Overhead Power and Reliability-Aware Task Mapping Based on Instruction Footprint for Real-Time Applications. - Alireza Namazi; Meisam Abdollahi; Saeed Safari; Siamak Mohammadi (DSD, 2017)

LRTM: Life-time and Reliability-aware Task Mapping Approach for Heterogeneous Multi-core Systems. - Alireza Namazi; Meisam Abdollahi; Saeed Safari; Siamak Mohammadi; Masoud Daneshtalab (NoCArc@MICRO, 2018)

Storage capacity for EDF-ASAP algorithm in energy-harvesting systems with periodic implicit deadline hard real-time tasks. - Ehsan Ghadaksaz; Saeed Safari (J. Syst. Archit., 2018)

A Majority-Based Reliability-Aware Task Mapping in High-Performance Homogenous NoC Architectures. - Alireza Namazi; Meisam Abdollahi; Saeed Safari; Siamak Mohammadi (ACM Trans. Embed. Comput. Syst., 2018)

A memory-efficient canonical data structure for decimal floating point arithmetic systems modeling and verification. - Mohammad Saeed Jahangiry; Saeed Safari (Turkish J. Electr. Eng. Comput. Sci., 2019)

Modeling Soft Error Propagation in Near-Threshold Combinational Circuits Using Neural Networks. - Ali Hajian; Saeed Safari (J. Electron. Test., 2019)

Dynamic behavioral modeling of nonlinear circuits using a novel recurrent neural network technique. - Zohreh Naghibi; Sayed Alireza Sadrossadat; Saeed Safari (Int. J. Circuit Theory Appl., 2019)

SORT: Semi Online Reliable Task Mapping for Embedded Multi-Core Systems. - Alireza Namazi; Saeed Safari; Siamak Mohammadi; Meisam Abdollahi (ACM Trans. Model. Perform. Evaluation Comput. Syst., 2019)

CMV: Clustered Majority Voting Reliability-Aware Task Scheduling for Multicore Real-Time Systems. - Alireza Namazi; Saeed Safari; Siamak Mohammadi (IEEE Trans. Reliab., 2019)

A reconfigurable real-time neuromorphic hardware for spiking winner-take-all network. - Behrooz Abdoli; Saeed Safari (Int. J. Circuit Theory Appl., 2020)

A digital hardware implementation of spiking neural networks with binary FORCE training. - Kaveh Akbarzadeh-Sherbaf; Saeed Safari; AbdolHossein Vahabie (Neurocomputing, 2020)

EREER: Energy-aware register file and execution unit using exploiting redundancy in GPGPUs. - Alireza Yazdanpanah; Sohrab Sajadimanesh; Saeed Safari (Microprocess. Microsystems, 2020)

A Novel Approximate Hamming Weight Computing for Spiking Neural Networks: an FPGA Friendly Architecture. - Kaveh Akbarzadeh-Sherbaf; Mikaeel Bahmani; Danial Ghiaseddin; Saeed Safari; AbdolHossein Vahabie (CoRR, 2021)

Recurrent neural networks models for analyzing single and multiple transient faults in combinational circuits. - Rasoul Farjaminezhad; Saeed Safari; Amir-Masoud Eftekhari-Moghadam (Microelectron. J., 2021)

Modeling of single/multiple-bit upset effects on logic circuits applying Recurrent Neural Network. - Rasoul Farjaminezhad; Saeed Safari; Amir-Masoud Eftekhari-Moghadam (Microelectron. J., 2021)

Adjoint recurrent neural network technique for nonlinear electronic component modeling. - Zohreh Naghibi; Sayed Alireza Sadrossadat; Saeed Safari (Int. J. Circuit Theory Appl., 2022)

Compression of Deep Neural Networks based on quantized tensor decomposition to implement on reconfigurable hardware platforms. - Amirreza Nekooei; Saeed Safari (Neural Networks, 2022)

A Hardware-Friendly Real-Time Implementation of the Auditory Attention Based on a Novel Spiking Winner-Take-All Network. - Behrooz Abdoli; Saeed Safari (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Real-Time Crosswalk Segmentation Using FPGA Based Spiking Neural Networks: A Comparison of Integrate-and-Fire and Izhikevich Hardware Neural Models. - Amirhesam Jafari Rad; Arista Monazzam; Amirhosein Reyhani ShowkatAbad; Saeed Safari (EWDTS, 2024)

Performance Improvement of Processor Through Configurable Approximate Arithmetic Units in Multicore Systems. - Seyed Ali Kashani Gharavi; Saeed Safari (IEEE Access, 2024)

AMCAL: Approximate Multiplier With the Configurable Accuracy Levels for Image Processing and Convolutional Neural Network. - Reza Zendegani; Saeed Safari (IEEE Access, 2024)

SSTE: Syllable-Specific Temporal Encoding to FORCE-learn audio sequences with an associative memory approach. - Nastaran Jannesar; Kaveh Akbarzadeh-Sherbaf; Saeed Safari; AbdolHossein Vahabie (Neural Networks, 2024)

Neural Network-Based Control of Forced-Convection and Thermoelectric Coolers. - Mahsa Akhsham; Mohammad Javad Dousti; Saeed Safari (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)