BOSS: Building Operating System Services. - Stephen Dawson-Haggerty; Andrew Krioukov; Jay Taneja; Sagar Karandikar; Gabe Fierro; Nikita Kitaev; David E. Culler (NSDI, 2013)

Vector Processors for Energy-Efficient Embedded Systems. - Daniel Palmer Dabbelt; Colin Schmidt 001; Eric Love; Howard Mao; Sagar Karandikar; Krste Asanovic (MES@ISCA, 2016)

Network Requirements for Resource Disaggregation. - Peter Xiang Gao; Akshay Narayan 001; Sagar Karandikar; João Carreira; Sangjin Han; Rachit Agarwal 001; Sylvia Ratnasamy; Scott Shenker (OSDI, 2016)

DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles. - Donggyu Kim; Christopher Celio; Sagar Karandikar; David Biancolin; Jonathan Bachrach; Krste Asanovic (FPL, 2018)

FASED: FPGA-Accelerated Simulation and Evaluation of DRAM. - David Biancolin; Sagar Karandikar; Donggyu Kim; Jack Koenig; Andrew Waterman; Jonathan Bachrach; Krste Asanovic (FPGA, 2019)

FPGA Accelerated INDEL Realignment in the Cloud. - Lisa Wu 001; David Bruns-Smith; Frank A. Nothaft; Qijing Huang 001; Sagar Karandikar; Johnny Le; Andrew Lin; Howard Mao; Brendan Sweeney; Krste Asanovic; David A. Patterson 001; Anthony D. Joseph (HPCA, 2019)

Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration. - Qijing Huang 001; Christopher Yarp; Sagar Karandikar; Nathan Pemberton; Benjamin Brock; Liang Ma 003; Guohao Dai; Robert Quitt; Krste Asanovic; John Wawrzynek (ICCAD, 2019)

FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. - Sagar Karandikar; Howard Mao; Donggyu Kim; David Biancolin; Alon Amid; Dayeol Lee; Nathan Pemberton; Emmanuel Amaro; Colin Schmidt 001; Aditya Chopra; Qijing Huang 001; Kyle Kovacs; et al. (IEEE Micro, 2019)

FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design. - Sagar Karandikar; Albert J. Ou; Alon Amid; Howard Mao; Randy H. Katz; Borivoje Nikolic; Krste Asanovic (ASPLOS, 2020)

Invited: Chipyard - An Integrated SoC Research and Implementation Environment. - Alon Amid; David Biancolin; Abraham Gonzalez; Daniel Grubb; Sagar Karandikar; Harrison Liew; Albert Magyar; Howard Mao; Albert J. Ou; Nathan Pemberton; Paul Rigge; Colin Schmidt 001; et al. (DAC, 2020)

Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. - Alon Amid; David Biancolin; Abraham Gonzalez; Daniel Grubb; Sagar Karandikar; Harrison Liew; Albert Magyar; Howard Mao; Albert J. Ou; Nathan Pemberton; Paul Rigge; Colin Schmidt 001; et al. (IEEE Micro, 2020)

COBRA: A Framework for Evaluating Compositions of Hardware Branch Predictors. - Jerry Zhao; Abraham Gonzalez; Alon Amid; Sagar Karandikar; Krste Asanovic (ISPASS, 2021)

A Hardware Accelerator for Protocol Buffers. - Sagar Karandikar; Chris Leary; Chris Kennelly; Jerry Zhao; Dinesh Parimi; Borivoje Nikolic; Krste Asanovic; Parthasarathy Ranganathan (MICRO, 2021)

Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim. - David Biancolin; Albert Magyar; Sagar Karandikar; Alon Amid; Borivoje Nikolic; Jonathan Bachrach; Krste Asanovic (IEEE Micro, 2021)

Profiling Hyperscale Big Data Processing. - Abraham Gonzalez; Aasheesh Kolli; Samira Manabi Khan; Sihang Liu 001; Vidushi Dadu; Sagar Karandikar; Jichuan Chang; Krste Asanovic; Parthasarathy Ranganathan (ISCA, 2023)

CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems. - Sagar Karandikar; Aniruddha N. Udipi; Junsun Choi; Joonho Whangbo; Jerry Zhao; Svilen Kanev; Edwin Lim; Jyrki Alakuijala; Vrishab Madduri; Yakun Sophia Shao; Borivoje Nikolic; Krste Asanovic; et al. (ISCA, 2023)

FireAxe: Partitioned FPGA-Accelerated Simulation of Large-Scale RTL Designs. - Joonho Whangbo; Edwin Lim; Chengyi Lux Zhang; Kevin Anderson; Abraham Gonzalez; Raghav Gupta; Nivedha Krishnakumar; Sagar Karandikar; Borivoje Nikolic; Yakun Sophia Shao; Krste Asanovic (ISCA, 2024)

Agile Hardware/Software Co-Design for Hyperscale Cloud Systems - Sagar Karandikar (2024)