Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formats. - Sahand Kashani; Mahyar Emami; James R. Larus (FPL, 2022)

Manticore: Hardware-Accelerated RTL Simulation with Static Bulk-Synchronous Parallelism. - Mahyar Emami; Sahand Kashani; Keisuke Kamahori; Mohammad Sepehr Pourghannad; Ritik Raj; James R. Larus (ASPLOS (4), 2023)

A 475 MHz Manycore FPGA Accelerator for RTL Simulation. - Sahand Kashani; Mahyar Emami; Keisuke Kamahori; Mohammad Sepehr Pourghannad; Ritik Raj; James R. Larus (FPGA, 2024)

Performance Interfaces for Hardware Accelerators. - Jiacheng Ma 002; Rishabh R. Iyer; Sahand Kashani; Mahyar Emami; Thomas Bourgeat; George Candea (OSDI, 2024)