The BXI Interconnect Architecture. - Said Derradji; Thibaut Palfer-Sollier; Jean-Pierre Panziera; Axel Poudes; Francois Wellenreiter (Hot Interconnects, 2015)

Efficiency Modeling and Analysis of 64-bit ARM Clusters for HPC. - Joël Wanza Weloli; Sébastien Bilavarn; Said Derradji; Cécile Belleudy; Sylvie Lesmanne (DSD, 2016)

The mont-blanc prototype: an alternative approach for HPC systems. - Nikola Rajovic; Alejandro Rico; Filippo Mantovani; Daniel Ruiz 003; Josep Oriol Vilarrubi; Constantino Gómez; Luna Backes; Diego Nieto; Harald Servat; Xavier Martorell; Jesús Labarta; Eduard Ayguadé; et al. (SC, 2016)

Efficiency modeling and exploration of 64-bit ARM compute nodes for exascale. - Joël Wanza Weloli; Sébastien Bilavarn; Maarten de Vries; Said Derradji; Cécile Belleudy (Microprocess. Microsystems, 2017)

Reducing Cache Coherence Traffic with a NUMA-Aware Runtime Approach. - Paul Caheny; Lluc Alvarez; Said Derradji; Mateo Valero; Miquel Moretó; Marc Casas (IEEE Trans. Parallel Distributed Syst., 2018)

Mont-Blanc 2020: Simulation Efforts Towards Exascale High Performance Computing : Embedded Tutorial on "DDECS-2020". - Alejandro Nocua; Said Derradji; Gregory Vaumourin; Pierre-Axel Lagadec; Zoltan Menyhart (DDECS, 2020)

Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors. - Adrià Armejach; Bine Brank; Jordi Cortina; François Dolique; Timothy Hayes 001; Nam Ho; Pierre-Axel Lagadec; Romain Lemaire; Guillem López-Paradís; Laurent Marliac; Miquel Moretó; Pedro Marcuello; et al. (DATE, 2021)

RED-SEA: Network Solution for Exascale Architectures. - Andrea Biagioni; Paolo Cretaro; Ottorino Frezza; Francesca Lo Cicero; Alessandro Lonardo; Michele Martinelli; Pier Stanislao Paolucci; Elena Pastorelli; Francesco Simula; Matteo Turisini; Piero Vicini; Roberto Ammendola; et al. (DSD, 2022)