Iterative decoding in analog CMOS. - Saied Hemati; Amir H. Banihashemi (ACM Great Lakes Symposium on VLSI, 2003)

A current mode maximum winner-take-all circuit with low voltage requirement for min-sum analog iterative decoders. - Saied Hemati; Amir H. Banihashemi (ICECS, 2003)

Comparison between continuous-time asynchronous and discrete-time synchronous iterative decoding. - Saied Hemati; Amir H. Banihashemi (GLOBECOM, 2004)

On the dynamics of continuous-time analog iterative decoding. - Saied Hemati; Amir H. Banihashemi (ISIT, 2004)

Improving belief propagation on graphs with cycles. - Mohammadreza Yazdani; Saied Hemati; Amir H. Banihashemi (IEEE Commun. Lett., 2004)

An 80-Mb/s 0.18-μm CMOS analog min-sum iterative decoder for a (32, 8, 10) LDPC code. - Saied Hemati; Amir H. Banihashemi; Calvin Plett (CICC, 2005)

A high-speed analog min-sum iterative decoder. - Saied Hemati; Amir H. Banihashemi; Calvin Plett (ISIT, 2005)

A 0.18-$muhbox m$CMOS Analog Min-Sum Iterative Decoder for a (32, 8) Low-Density Parity-Check (LDPC) Code. - Saied Hemati; Amir H. Banihashemi; Calvin Plett (IEEE J. Solid State Circuits, 2006)

Dynamics and performance analysis of analog iterative decoding for low-density parity-check (LDPC) codes. - Saied Hemati; Amir H. Banihashemi (IEEE Trans. Commun., 2006)

Convergence Speed and Throughput of Analog Decoders. - Saied Hemati; Amir H. Banihashemi (IEEE Trans. Commun., 2007)

A Relaxed Half-Stochastic Iterative Decoder for LDPC Codes. - François Leduc-Primeau; Saied Hemati; Warren J. Gross; Shie Mannor (GLOBECOM, 2009)

A differential binary message-passing LDPC decoder. - Nastaran Mobini; Amir H. Banihashemi; Saied Hemati (IEEE Trans. Commun., 2009)

Relaxed half-stochastic decoding of LDPC codes over GF(q). - Gabi Sarkis; Saied Hemati; Shie Mannor; Warren J. Gross (Allerton, 2010)

Lowering Error Floors Using Dithered Belief Propagation. - François Leduc-Primeau; Saied Hemati; Shie Mannor; Warren J. Gross (GLOBECOM, 2010)

Stochastic Chase Decoding of Reed-Solomon Codes. - Camille Leroux; Saied Hemati; Shie Mannor; Warren J. Gross (IEEE Commun. Lett., 2010)

A Min-Sum Iterative Decoder Based on Pulsewidth Message Encoding. - Kevin Cushon; Camille Leroux; Saied Hemati; Shie Mannor; Warren J. Gross (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Dynamics of analog decoders for different message representation domains. - Saied Hemati; Abbas Yongaçoglu (IEEE Trans. Commun., 2010)

On the Dynamics of Analog Min-Sum Iterative Decoders: An Analytical Approach. - Saied Hemati; Abbas Yongaçoglu (IEEE Trans. Commun., 2010)

Majority-based tracking forecast memories for stochastic LDPC decoding. - Saeed Sharifi Tehrani; Ali Naderi; Guy-Armand Kamendje; Saied Hemati; Shie Mannor; Warren J. Gross (IEEE Trans. Signal Process., 2010)

Stochastic chase decoder for reed-solomon codes. - Romain Heloir; Camille Leroux; Saied Hemati; Matthieu Arzel; Warren J. Gross (NEWCAS, 2012)

Low-Complexity Channel-Likelihood Estimation for Non-Binary Codes and QAM. - Guanghua He; Gabi Sarkis; Saied Hemati; Warren J. Gross; Baoming Bai (IEEE Commun. Lett., 2012)

Dithered Belief Propagation Decoding. - François Leduc-Primeau; Saied Hemati; Shie Mannor; Warren J. Gross (IEEE Trans. Commun., 2012)

Relaxed Half-Stochastic Belief Propagation. - François Leduc-Primeau; Saied Hemati; Shie Mannor; Warren J. Gross (IEEE Trans. Commun., 2013)

Stochastic Decoding of LDPC Codes over GF(q). - Gabi Sarkis; Saied Hemati; Shie Mannor; Warren J. Gross (IEEE Trans. Commun., 2013)

Adaptive Multiset Stochastic Decoding of Non-Binary LDPC Codes. - Alexandru Ciobanu; Saied Hemati; Warren J. Gross (IEEE Trans. Signal Process., 2013)

Energy-efficient gear-shift LDPC decoders. - Kevin Cushon; Saied Hemati; Shie Mannor; Warren J. Gross (ASAP, 2014)

High-Throughput Energy-Efficient LDPC Decoders Using Differential Binary Message Passing. - Kevin Cushon; Saied Hemati; Camille Leroux; Shie Mannor; Warren J. Gross (IEEE Trans. Signal Process., 2014)

Efficient implementation of structured long block-length LDPC codes. - Andrew J. Wong; Saied Hemati; Warren J. Gross (ASAP, 2015)

Exploiting dental implants for creating wired implantable health monitoring devices. - Saied Hemati; Sepideh Rahmani (HealthCom, 2016)

Mitigating hardware cyber-security risks in error correcting decoders. - Saied Hemati (ISTC, 2016)

A Relaxed Min-Sum LDPC Decoder With Simplified Check Nodes. - Saied Hemati; François Leduc-Primeau; Warren J. Gross (IEEE Commun. Lett., 2016)

Symbolic Stochastic Chase Decoding of Reed-Solomon and BCH Codes. - Hossein Mani; Saied Hemati (CoRR, 2017)

Power Grid Resiliency Improvement Through Remedial Action Schemes. - Parviz Khaledian; Brian K. Johnson; Saied Hemati (IECON, 2018)

Dynamics of ML Approaching Randomized Decoders on Graphs with Cycles. - Saied Hemati (MWSCAS, 2018)

A Modular Architecture for Structured Long Block-Length LDPC Decoders. - Andrew J. Wong; Saied Hemati; Warren J. Gross (J. Signal Process. Syst., 2018)

Symbol-Level Stochastic Chase Decoding of Reed-Solomon and BCH Codes. - Hossein Mani; Saied Hemati (IEEE Trans. Commun., 2019)

Human-in-the-loop Learning for Personalized Diet Monitoring from Unstructured Mobile Data. - Niloofar Hezarjaribi; Sepideh Mazrouee; Saied Hemati; Naomi Chaytor; Martine Perrigue; Hassan Ghasemzadeh 001 (ACM Trans. Interact. Intell. Syst., 2019)

Personality Assessment from Text for Machine Commonsense Reasoning. - Niloofar Hezarjaribi; Zhila Esna Ashari; James F. Frenzel; Hassan Ghasemzadeh 001; Saied Hemati (CoRR, 2020)