Comprehending In-memory Computing Trends via Proper Benchmarking. - Naresh R. Shanbhag; Saion K. Roy (CICC, 2022)

Fundamental Limits on the Computational Accuracy of Resistive Crossbar-based In-memory Architectures. - Saion K. Roy; Ameya Patil; Naresh R. Shanbhag (ISCAS, 2022)

Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation. - Saion K. Roy; Han-Mo Ou; Mostafa Gamal Ahmed; Peter Deaville; Bonan Zhang; Naveen Verma; Pavan Kumar Hanumolu; Naresh R. Shanbhag (ESSCIRC, 2023)

On the Security Vulnerabilities of MRAM-based In-Memory Computing Architectures against Model Extraction Attacks. - Saion K. Roy; Naresh R. Shanbhag (ICCAD, 2024)

Compute SNDR-Boosted 22-nm MRAM-Based In-Memory Computing Macro Using Statistical Error Compensation. - Saion K. Roy; Han-Mo Ou; Mostafa Gamal Ahmed; Peter Deaville; Bonan Zhang; Naveen Verma; Pavan Kumar Hanumolu; Naresh R. Shanbhag (IEEE J. Solid State Circuits, 2025)