Integration of TTA processor tools to Kactus2 IP-XACT design flow. - Lauri Matilainen; Sakari Lahti; Otto Esko; Erno Salminen; Timo D. Hämäläinen (NORCHIP, 2012)

Designing a clock cycle accurate application with high-level synthesis. - Sakari Lahti; Jarno Vanne; Timo D. Hämäläinen (IECON, 2016)

Are We There Yet? A Study on the State of High-Level Synthesis. - Sakari Lahti; Panu Sjovall; Jarno Vanne; Timo D. Hämäläinen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Implementation of a Nonlinear Self-Interference Canceller using High-Level Synthesis. - Sakari Lahti; Pablo Pascual Campo; Vesa Lampu; Lauri Anttila; Mikko Valkama; Timo D. Hämäläinen (ISCAS, 2020)

High-Level Synthesis Implementation of an Embedded Real-Time HEVC Intra Encoder on FPGA for Media Applications. - Panu Sjövall; Ari Lemmetti; Jarno Vanne; Sakari Lahti; Timo D. Hämäläinen (ACM Trans. Design Autom. Electr. Syst., 2022)

Leveraging Modern C++ in High-Level Synthesis. - Sakari Lahti; Matti Rintala; Timo D. Hämäläinen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

An Efficient High-level Synthesis Implementation of the MUSIC DoA Algorithm for FPGA. - Sakari Lahti; Tuomas Aaltonen; Elizaveta Rastorgueva-Foi; Jukka Talvitie; Bo Tan 003; Timo D. Hämäläinen (DDECS, 2024)

High-Level Synthesis for FPGAs - A Hardware Engineer's Perspective. - Sakari Lahti; Timo D. Hämäläinen (IEEE Access, 2025)