Efficient design and synthesis of decimation filters for wideband delta-sigma ADCs. - Rajaram Mohan Roy Koppula; Sakkarapani Balagopal; Vishal Saxena (SoCC, 2011)

Design of wideband continuous-time ΔΣ ADCs using two-step quantizers. - Sakkarapani Balagopal; Vishal Saxena (MWSCAS, 2012)

A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT-ΔΣ ADC with 1.5 cycle quantizer delay and improved STF. - Sakkarapani Balagopal; Vishal Saxena (MWSCAS, 2012)

Systematic synthesis of cascaded continuous-time ΔΣ ADCs for wideband data conversion. - Sakkarapani Balagopal; Kehan Zhu; Vishal Saxena (MWSCAS, 2013)

Design of a 10-Gb/s integrated limiting receiver for silicon photonics interconnects. - Kehan Zhu; Sakkarapani Balagopal; Vishal Saxena; Wan Kuang (MWSCAS, 2013)

A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning. - Xinyu Wu 002; Vishal Saxena; Kehan Zhu; Sakkarapani Balagopal (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Realization of a 10 GHz PLL in IBM 130 nm SiGe BiCMOS process for optical transmitter. - Kehan Zhu; Sakkarapani Balagopal; Xinyu Wu 002; Vishal Saxena (ISCAS, 2017)