GEM: A Geometric Algorithm for Scheduling. - Salil Raje; Majid Sarrafzadeh (ISCAS, 1993)

Approximation Algorithm on Multi-Way Maxcut Partitioning. - Jun Dong Cho; Salil Raje; Majid Sarrafzadeh (ESA, 1994)

Constrained Register Allocation in Bus Architectures. - Elof Frank; Salil Raje; Majid Sarrafzadeh (DAC, 1995)

Variable voltage scheduling. - Salil Raje; Majid Sarrafzadeh (ISLPD, 1995)

Observable Time Windows: Verifying the Results of High-Level Synthesis. - Reinaldo A. Bergamaschi; Salil Raje (ED&TC, 1996)

Generalized resource sharing. - Salil Raje; Reinaldo A. Bergamaschi (ICCAD, 1997)

Observable Time Windows: Verifying High-Level Synthesis Results. - Reinaldo A. Bergamaschi; Salil Raje (IEEE Des. Test Comput., 1997)

Scheduling with multiple voltages. - Salil Raje; Majid Sarrafzadeh (Integr., 1997)

Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system. - Reinaldo A. Bergamaschi; Salil Raje; Indira Nair; Louise Trevillyan (IEEE Trans. Very Large Scale Integr. Syst., 1997)

Fast Approximation Algorithms on Maxcut, k-Coloring, and k-Color Ordering vor VLSI Applications. - Jun Dong Cho; Salil Raje; Majid Sarrafzadeh (IEEE Trans. Computers, 1998)

Scheduling with multiple voltages under resource constraints. - Majid Sarrafzadeh; Salil Raje (ISCAS (1), 1999)

Overcoming wireload model uncertainty during physical design. - Padmini Gopalakrishnan; Altan Odabasioglu; Lawrence T. Pileggi; Salil Raje (ISPD, 2001)

An analysis of the wire-load model uncertainty problem. - Padmini Gopalakrishnan; Altan Odabasioglu; Lawrence T. Pileggi; Salil Raje (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Multi-Million Gate FPGA Physical Design Challenges. - Maogang Wang; Abhishek Ranjan; Salil Raje (ICCAD, 2003)

Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources. - Navaratnasothie Selvakkumaran; Abhishek Ranjan; Salil Raje; George Karypis (DAC, 2004)

What is the right model for programming and using modern FPGAs? - André DeHon; Brad L. Hutchings; Daryl Rudusky; James Hwang; Nikhil; Salil Raje; Adrian Stoica (FPGA, 2004)

Innovate or perish: FPGA physical design. - Taraneh Taghavi; Soheil Ghiasi; Abhishek Ranjan; Salil Raje; Majid Sarrafzadeh (ISPD, 2004)