Optimisation of very low voltage TVS protection devices. - Jesús Urresti; Salvador Hidalgo; David Flores; Jaume Roig; José Rebollo; I. Mazarredo (Microelectron. J., 2003)

Passivation and packaging of positive bevelled edge termination and related electrical stability. - Salvador Hidalgo; David Flores; Isabel Obieta; I. Mazarredo (Microelectron. Reliab., 2003)

Thin-film silicon-on-sapphire LDMOS structures for RF power amplifier applications. - Jaume Roig; David Flores; Salvador Hidalgo; José Rebollo; José Millán (Microelectron. J., 2004)

Design considerations for 6.5 kV IGBT devices. - Miquel Vellvehí; David Flores; Xavier Jordà; Salvador Hidalgo; José Rebollo; L. Coulbeck; P. Waind (Microelectron. J., 2004)

Analysis of hot-carrier degradation in a SOI LDMOS transistor with a steep retrograde drift doping profile. - Ignasi Cortés; Jaume Roig; David Flores; Jesús Urresti; Salvador Hidalgo; José Rebollo (Microelectron. Reliab., 2005)

Lateral punch-through TVS devices for on-chip protection in low-voltage applications. - Jesús Urresti; Salvador Hidalgo; David Flores; Jaume Roig; Ignasi Cortés; José Rebollo (Microelectron. Reliab., 2005)

Superjunction LDMOS on thick-SOI technology for RF applications. - Ignasi Cortés; Pablo Fernández-Martínez; David Flores; Salvador Hidalgo; José Rebollo (Microelectron. J., 2008)

Analysis of punch-through breakdown in bulk silicon RF power LDMOS transistors. - Ignasi Cortés; Pablo Fernández-Martínez; David Flores; Salvador Hidalgo; José Rebollo (Microelectron. Reliab., 2008)

IGBT module failure analysis in railway applications. - X. Perpiñà; Jean-François Serviere; Xavier Jordà; A. Fauquet; Salvador Hidalgo; Jesús Urresti-Ibañez; José Rebollo; Michel Mermet-Guyennet (Microelectron. Reliab., 2008)

Analysis of Clamped Inductive Turnoff Failure in Railway Traction IGBT Power Modules Under Overload Conditions. - Xavier Perpiñà; Jean-François Serviere; Jesús Urresti-Ibañez; Ignasi Cortés; Xavier Jordà; Salvador Hidalgo; José Rebollo; Michel Mermet-Guyennet (IEEE Trans. Ind. Electron., 2011)

Simulation methodology for dose effects in lateral DMOS transistors. - Pablo Fernández-Martínez; Francisco Rogelio Palomo; S. Díez; Salvador Hidalgo; Miguel Ullán; David Flores; Roland Sorge (Microelectron. J., 2012)

The use of digital image processing for IC reverse engineering. - Raul Quijada; Arnau Raventos; Francesc Tarres; Roger Dura; Salvador Hidalgo (SSD, 2014)

3.3 kV PT-IGBT with voltage-sensor monolithically integrated. - Jesús Urresti; Salvador Hidalgo; David Flores; Daniel Fernández Hevia (IET Circuits Devices Syst., 2014)

A Verilog-A model of a silicon resistive strip for particle detectors. - Nil Franch; Oscar Alonso; Ángel Diéguez; Salvador Hidalgo; Iván Vila (SMACD, 2016)

Large-Area Automated Layout Extraction Methodology for Full-IC Reverse Engineering. - Raul Quijada; Roger Dura; Jofre Pallares; Xavier Formatje; Salvador Hidalgo; Francisco Serra-Graells (J. Hardw. Syst. Secur., 2018)

Study of Ionization Charge Density-Induced Gain Suppression in LGADs. - María del Carmen Jiménez-Ramos; Javier García López; Adrián García-Osuna; Iván Vila; Esteban Currás; Richard Jaramillo; Salvador Hidalgo; Giulio Pellegrini (Sensors, 2022)

Inverse LGAD (iLGAD) Periphery Optimization for Surface Damage Irradiation. - Albert Doblas; David Flores; Salvador Hidalgo; Neil Moffat; Giulio Pellegrini; David Quirion; Jairo Villegas; Dzmitry Maneuski; Marie Ruat; Pablo Fajardo (Sensors, 2023)