A comparison of via-programmable gate array logic cell circuits. - Thomas C. P. Chau; Philip Heng Wai Leong; Sam M. H. Ho; Brian P. W. Chan; Steve C. L. Yuen; Kong-Pang Pun; Oliver C. S. Choy; Xinan Wang (FPGA, 2009)

Rapid prototyping on a structured ASIC fabric. - Steve C. L. Yuen; Yanqing Ai; Brian P. W. Chan; Thomas C. P. Chau; Sam M. H. Ho; Oscar K. L. Lau; Kong-Pang Pun; Philip Heng Wai Leong; Oliver C. S. Choy (ASP-DAC, 2010)

Design of a single layer programmable Structured ASIC library. - Thomas C. P. Chau; David W. L. Wu; Yanqing Ai; Brian P. W. Chan; Sam M. H. Ho; Oscar K. L. Lau; Steve C. L. Yuen; Kong-Pang Pun; Oliver C. S. Choy; Philip Heng Wai Leong (DDECS, 2010)

Structured ASIC: Methodology and comparison. - Sam M. H. Ho; Steve C. L. Yuen; Hiu Ching Poon; Thomas C. P. Chau; Yanqing Ai; Philip Heng Wai Leong; Oliver C. S. Choy; Kong-Pang Pun (FPT, 2010)

Towards FPGA-assisted spark: An SVM training acceleration case study. - Sam M. H. Ho; Maolin Wang 002; Ho-Cheung Ng; Hayden Kwok-Hay So (ReConFig, 2016)

High-throughput cellular imaging with high-speed asymmetric-detection time-stretch optical microscopy under FPGA platform. - Ho-Cheung Ng; Maolin Wang 002; Bob M. F. Chung; B. Sharat Chandra Varma 001; Manish Kumar Jaiswal; Sam M. H. Ho; Kevin K. Tsia; Ho Cheung Shum; Hayden Kwok-Hay So (ReConFig, 2016)

A Parameterizable Activation Function Generator for FPGA-Based Neural Network Applications. - Sam M. H. Ho; C.-H. Dominic Hung; Ho-Cheung Ng; Maolin Wang 002; Hayden Kwok-Hay So (FCCM, 2017)

NnCore: A parameterized non-linear function generator for machine learning applications in FPGAs. - Sam M. H. Ho; Hayden Kwok-Hay So (FPT, 2017)