Micro-architecture independent analytical processor performance and power modeling. - Sam Van den Steen; Sander De Pestel; Moncef Mechri; Stijn Eyerman; Trevor E. Carlson; David Black-Schaffer; Erik Hagersten; Lieven Eeckhout (ISPASS, 2015)

Analytical Processor Performance and Power Modeling Using Micro-Architecture Independent Characteristics. - Sam Van den Steen; Stijn Eyerman; Sander De Pestel; Moncef Mechri; Trevor E. Carlson; David Black-Schaffer; Erik Hagersten; Lieven Eeckhout (IEEE Trans. Computers, 2016)

RPPM: Rapid Performance Prediction of Multithreaded Applications on Multicore Hardware. - Sander De Pestel; Sam Van den Steen; Shoaib Akram 001; Lieven Eeckhout (IEEE Comput. Archit. Lett., 2018)

Modeling Superscalar Processor Memory-Level Parallelism. - Sam Van den Steen; Lieven Eeckhout (IEEE Comput. Archit. Lett., 2018)

RPPM: Rapid Performance Prediction of Multithreaded Workloads on Multicore Processors. - Sander De Pestel; Sam Van den Steen; Shoaib Akram 001; Lieven Eeckhout (ISPASS, 2019)

Breaking In-Order Branch Miss Recovery. - Stijn Eyerman; Wim Heirman; Sam Van den Steen; Ibrahim Hur (IEEE Comput. Archit. Lett., 2020)

Enabling Branch-Mispredict Level Parallelism by Selectively Flushing Instructions. - Stijn Eyerman; Wim Heirman; Sam Van den Steen; Ibrahim Hur (MICRO, 2021)

Simulating Wrong-Path Instructions in Decoupled Functional-First Simulation. - Stijn Eyerman; Sam Van den Steen; Wim Heirman; Ibrahim Hur (ISPASS, 2023)