An 8.4mW/Gb/s 4-lane 48Gb/s multi-standard-compliant transceiver in 40nm digital CMOS technology. - Mehrdad Ramezani; Mohamed Abdalla; Ayal Shoval; Marcus van Ierssel; Afshin Rezayee; Angus McLaren; Chris D. Holdenried; Jennifer Pham; Eric So; David Cassan; Saman Sadr (ISSCC, 2011)

A low jitter 2.7mW/Gbps 180Gb/s 12-lane transmitter in a 40nm CMOS technology. - Kamran Farzan; Mehrdad Ramezani; Angus McLaren; Roman Pahuta; Nadeesha Amarasinghe; David Cassan; Saman Sadr (ESSCIRC, 2012)

Test considerations for jitter tolerance of wireline receivers. - Roberto DiCecco; Roman Pahuta; Chris D. Holdenried; Saman Sadr (CCECE, 2014)

Performance of edge tap decision feedback equalization methods for wireline receivers. - Chris D. Holdenried; Ryan Bespalko; Marcus van Ierssel; Mehrdad Ramezani; David Cassan; Siamak Sarvari; Saman Sadr (NEWCAS, 2014)

New 2-D Eye-Opening Monitor for Gb/s Serial Links. - Alaa R. Al-Taee; Fei Yuan 005; Andy Gean Ye; Saman Sadr (IEEE Trans. Very Large Scale Integr. Syst., 2014)

High speed ADCs for wireline applications. - Mohammad Sadegh Jalali; Masum Hossain; Kenneth Dyer; Saman Sadr (MWSCAS, 2017)

A 4-Lane 1.25-to-28.05Gb/s multi-standard 6pJ/b 40dB transceiver in 14nm FinFET with independent TX/RX rate support. - Mohammad Sadegh Jalali; Mohammad Hossein Taghavi; Angus McLaren; Jennifer Pham; Kamran Farzan; Dominic DiClemente; Marcus van Ierssel; William Song; Saman Asgaran; Chris D. Holdenried; Saman Sadr (ISSCC, 2018)