Samantika Sury

According to our database1, Samantika Sury authored at least 13 papers between 2006 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
A Holistic Systems Approach to Leveraging Heterogeneity.
Proceedings of the IEEE/ACM Programming Environments for Heterogeneous Computing, 2021

2019
CONCORD: Improving Communication using Consumer-Count Detection.
Proceedings of the 16th IEEE/ACS International Conference on Computer Systems and Applications, 2019

2018
Autonomic Secure HPC Fabric Architecture.
Proceedings of the 15th IEEE/ACS International Conference on Computer Systems and Applications, 2018

2016
Planning Your SQL-on-Hadoop Deployment Using a Low-Cost Simulation-Based Approach.
Proceedings of the 28th International Symposium on Computer Architecture and High Performance Computing, 2016

High Performance Parallel Stochastic Gradient Descent in Shared Memory.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium, 2016

2013
Using in-flight chains to build a scalable cache coherence protocol.
ACM Trans. Archit. Code Optim., 2013

2012
CRUISE: cache replacement and utility-aware scheduling.
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012

2009
Design and optimization of the store vectors memory dependence predictor.
ACM Trans. Archit. Code Optim., 2009

Zesto: A cycle-level simulator for highly detailed microarchitecture exploration.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009

Criticality-based optimizations for efficient load processing.
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009

2008
PEEP: Exploiting predictability of memory dependences in SMT processors.
Proceedings of the 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 2008

2006
Fire-and-Forget: Load/Store Scheduling with No Store Queue at All.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

Store vectors for scalable memory dependence prediction and scheduling.
Proceedings of the 12th International Symposium on High-Performance Computer Architecture, 2006


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