Sameh W. Asaad

According to our database, Sameh W. Asaad authored at least 23 papers between 1996 and 2023.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2023

RackBlox: A Software-Defined Rack-Scale Storage System with Network-Storage Co-Design.

Benjamin Reidys, Yuqi Xue, Daixuan Li, Bharat Sukhwani, Wen-Mei Hwu, Deming Chen, Sameh W. Asaad, Jian Huang

Proceedings of the 29th Symposium on Operating Systems Principles, 2023

Janus: An Experimental Reconfigurable SmartNIC with P4 Programmability and SDN Isolation.

Bharat Sukhwani, Mohit Kapur, Alda Ohmacht, Liran Schour, Martin Ohmacht, Chris Ward, Chuck Haymes, Sameh W. Asaad

Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

2017

Contutto: a novel FPGA-based prototyping platform enabling innovation in the memory subsystem of a server class processor.

Bharat Sukhwani, Thomas Roewer, Charles L. Haymes, Kyu-Hyoun Kim, Adam J. McPadden, Daniel M. Dreps, Dean Sanner, Jan van Lunteren, Sameh W. Asaad

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

2016

Spatial Predicates Evaluation in the Geohash Domain Using Reconfigurable Hardware.

Dajung Lee, Roger Moussalli, Sameh W. Asaad, Mudhakar Srivatsa

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015

A Hardware/Software Approach for Database Query Acceleration with FPGAs.

Bharat Sukhwani, Mathew Thoennes, Hong Min, Parijat Dube, Bernard Brezzo, Sameh W. Asaad, Donna Dillenberger

Int. J. Parallel Program., 2015

Fast and Flexible Conversion of Geohash Codes to and from Latitude/Longitude Coordinates.

Roger Moussalli, Mudhakar Srivatsa, Sameh W. Asaad

Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

2014

A Fully Pipelined FPGA Architecture of a Factored Restricted Boltzmann Machine Artificial Neural Network.

Lok-Won Kim, Sameh W. Asaad, Ralph Linsker

ACM Trans. Reconfigurable Technol. Syst., 2014

Database Analytics: A Reconfigurable-Computing Approach.

Bharat Sukhwani, Hong Min, Mathew Thoennes, Parijat Dube, Bernard Brezzo, Sameh W. Asaad, Donna Dillenberger

IEEE Micro, 2014

Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100, 000× Reduction in Energy-to-Solution.

Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul Merolla, Pallab Datta, Marc González Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir, Steven K. Esser, Jeff Kusnitz, Rathinakumar Appuswamy, Chuck Haymes, Bernard Brezzo, Roger Moussalli, Ralph Bellofatto, Christian W. Baks, Michael Mastro, Kai Schleupen, Charles E. Cox, Ken Inoue, Steven E. Millman, Nabil Imam, Emmett McQuinn, Yutaka Y. Nakamura, Ivan Vo, Chen Guok, Don Nguyen, Scott Lekuch, Sameh W. Asaad, Daniel J. Friedman, Bryan L. Jackson, Myron Flickner, William P. Risk, Rajit Manohar, Dharmendra S. Modha

Proceedings of the International Conference for High Performance Computing, 2014

2013

Large Payload Streaming Database Sort and Projection on FPGAs.

Bharat Sukhwani, Mathew Thoennes, Hong Min, Parijat Dube, Bernard Brezzo, Sameh W. Asaad, Donna Dillenberger

Proceedings of the 25th International Symposium on Computer Architecture and High Performance Computing, 2013

FINPAGE: Generating high performance feed-specific parser circuits.

Roger Moussalli, Bharat Sukhwani, Sameh W. Asaad

Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Accelerating Join Operation for Relational Databases with FPGAs.

Robert J. Halstead, Bharat Sukhwani, Hong Min, Mathew Thoennes, Parijat Dube, Sameh W. Asaad, Balakrishna Iyer

Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2012

Efficient in-system RTL verification and debugging using FPGAs (abstract only).

Proshanta Saha, Chuck Haymes, Ralph Bellofatto, Bernard Brezzo, Mohit Kapur, Sameh W. Asaad

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation.

Sameh W. Asaad, Ralph Bellofatto, Bernard Brezzo, Chuck Haymes, Mohit Kapur, Benjamin D. Parker, Thomas Roewer, Proshanta Saha, Todd Takken, José A. Tierno

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

Database analytics acceleration using FPGAs.

Bharat Sukhwani, Hong Min, Mathew Thoennes, Parijat Dube, Balakrishna Iyer, Bernard Brezzo, Donna Dillenberger, Sameh W. Asaad

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011

High-Throughput, Lossless Data Compresion on FPGAs.

Bharat Sukhwani, Bülent Abali, Bernard Brezzo, Sameh W. Asaad

Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2004

Design methodology for semi custom processor cores.

Victor V. Zyuban, Sameh W. Asaad, Thomas W. Fox, Anne-Marie Haen, Daniel Littrell, Jaime H. Moreno

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2003

An innovative low-power high-performance programmable signal processor for digital communications.

Jaime H. Moreno, Victor V. Zyuban, Uzi Shvadron, Fredy D. Neeser, Jeff H. Derby, Malcolm S. Ware, Krishnan Kailas, Ayal Zaks, Amir B. Geva, Shay Ben-David, Sameh W. Asaad, Thomas W. Fox, Daniel Littrell, Marina Biberstein, Dorit Naishlos, Hillery C. Hunter

IBM J. Res. Dev., 2003

Reducing instruction fetch energy with backwards branch control information and buffering.

Jude A. Rivers, Sameh W. Asaad, John-David Wellman, Jaime H. Moreno

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

2000

Model-integrated Tools for the Design of Dynamically Reconfigurable Systems.

Ted Bapty, Sandeep Neema, Jason Scott, Janos Sztipanovits, Sameh W. Asaad

VLSI Design, 2000

1998

Designing a Testable System on a Chip.

Stephen V. Kosonocky, Arthur A. Bright, Kevin W. Warren, Ruud A. Haring, Steve Klepner, Sameh W. Asaad, S. Basavaiah, Bob Havreluk, David F. Heidel, Michael Immediato, Keith A. Jenkins, Rajiv V. Joshi, Benjamin D. Parker, T. V. Rajeevakumar, Kevin Stawiasz

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

Speed Optimization of the ALR Circuit Using an FPGA with Embedded RAM: A Design Experience.

Sameh W. Asaad, Kevin W. Warren

Proceedings of the Field-Programmable Logic and Applications, 1998

1996

A novel pneumatic rubber actuator for mobile robot bases.

Koichi Suzumori, Sameh W. Asaad

Proceedings of IEEE/RSJ International Conference on Intelligent Robots and Systems. IROS 1996, 1996