Comparative review of NoCs in the context of ASICs and FPGAs. - Khaled A. Helal; Sameh Attia; Tawfik Ismail; Hassan Mostafa (ISCAS, 2015)

Priority-select arbiter: An efficient round-robin arbiter. - Khaled A. Helal; Sameh Attia; Tawfik Ismail; Hassan Mostafa (NEWCAS, 2015)

Optimizing FPGA-based hard networks-on-chip by minimizing and sharing resources. - Sameh Attia; Hossam A. H. Fahmy; Yehea Ismail; Hassan Mostafa (Integr., 2018)

Dual Split-Merge: A high throughput router architecture for FPGAs. - Khaled A. Helal; Sameh Attia; Hossam A. H. Fahmy; Tawfik Ismail; Yehea Ismail; Hassan Mostafa (Microelectron. J., 2018)

Safe Task Interruption for FPGAs. - Sameh Attia; Vaughn Betz (FCCM, 2019)

StateMover: Combining Simulation and Hardware Execution for Efficient FPGA Debugging. - Sameh Attia; Vaughn Betz (FPGA, 2020)

StateReveal: Enabling Checkpointing of FPGA Designs with Buried State. - Sameh Attia; Vaughn Betz (FPT, 2020)

Feel Free to Interrupt: Safe Task Stopping to Enable FPGA Checkpointing and Context Switching. - Sameh Attia; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2020)

StateLink: FPGA System Debugging via Flexible Simulation/Hardware Integration. - Sameh Attia; Vaughn Betz (FPT, 2021)

Stop and Look: A Novel Checkpointing and Debugging Flow for FPGAs. - Sameh Attia; Vaughn Betz (IEEE Trans. Computers, 2022)

Toward Software-like Debugging for FPGAs via Checkpointing and Transaction-based Co-Simulation. - Sameh Attia; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2023)