A 50-100 MHz 5 V to -5 V, 1 W Cuk converter using gallium arsenide power switches. - Mamadou Gaye; Sami Ajram; Jean-Yves Lebas; Romain Kozlowski; Georges Salmer (ISCAS, 2000)

Low Power and Low Jitter Wideband Clock Synthesizers in CMOS ASICs. - Régis Roubadia; Sami Ajram; Guy Cathébras (PATMOS, 2006)

Design of a Low Jitter Multi-Phase Realigned PLL in submicronic CMOS technology. - Régis Roubadia; Sami Ajram; Guy Cathébras (ISCAS, 2007)