All digital baseband 50 Mbps data recovery using 5× oversampling with 0.9 data unit interval clock jitter tolerance. - Sanad Bushnaq; Toru Nakura; Makoto Ikeda; Kunihiro Asada (DDECS, 2009)

All-digital 400∼900 MHz power amplifier consuming 0.03 mW/MHz using 0.18 μm CMOS. - Sanad Bushnaq; Makoto Ikeda; Kunihiro Asada (ICECS, 2011)

Range extension of inductive coupling communication using multi-stage resonance. - Sanad Bushnaq; Makoto Ikeda; Kunihiro Asada (ISCIT, 2012)

All-digital tunable power amplifier consuming 0.03mW/MHz using 0.18µm CMOS. - Sanad Bushnaq; Makoto Ikeda; Kunihiro Asada (IEICE Electron. Express, 2012)

All-Digital Wireless Transceiver with Sub-Sampling Demodulation and Burst-Error Correction. - Sanad Bushnaq; Makoto Ikeda; Kunihiro Asada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012)

A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology. - Hiroshi Maejima; Kazushige Kanda; Susumu Fujimura; Teruo Takagiwa; Susumu Ozawa; Jumpei Sato; Yoshihiko Shindo; Manabu Sato; Naoaki Kanagawa; Junji Musha; Satoshi Inoue; Katsuaki Sakurai; et al. (ISSCC, 2018)

13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with tPROG=75µs and tR=4µs. - Toshiyuki Kouchi; Noriyasu Kumazaki; Masashi Yamaoka; Sanad Bushnaq; Takuyo Kodama; Yuki Ishizaki; Yoko Deguchi; Akio Sugahara; Akihiro Imamoto; Norichika Asaoka; Ryosuke Isomura; Takaya Handa; et al. (ISSCC, 2020)

inDepth: Force-based Interaction with Objects beyond A Physical Barrier. - Takatoshi Yoshida; Junichi Ogawa; Kyung Yun Choi; Sanad Bushnaq; Ken Nakagaki; Hiroshi Ishii 001 (TEI, 2021)

A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs. - Toshiyuki Kouchi; Mami Kakoi; Noriyasu Kumazaki; Akio Sugahara; Akihiro Imamoto; Yasufumi Kajiyama; Yuri Terada; Sanad Bushnaq; Naoaki Kanagawa; Takuyo Kodama; Ryo Fukuda; Hiromitsu Komai; et al. (IEEE J. Solid State Circuits, 2021)