A low phase noise and low power 3-5 GHz frequency synthesizer in 0.18 µm CMOS technology. - Ebrahim Abiri; Mohammad Reza Salehi; Sanaz Salem (Microelectron. J., 2014)

Design of multiple-valued logic gates using gate-diffusion input for image processing applications. - Ebrahim Abiri; Abdolreza Darabi; Sanaz Salem (Comput. Electr. Eng., 2018)

Fault-tolerant delay cell for ring oscillator application in 65 nm CMOS technology. - Sanaz Salem; Hamed Zandevakili; Ali Mahani 001; Mohsen Saneei (IET Circuits Devices Syst., 2018)

Jitter and metastability analysis and modeling of multilevel bang-bang phase detector. - Sanaz Salem; Mohsen Saneei; Dariush Abbasi-Moghadam (Int. J. Circuit Theory Appl., 2020)

Jitter Modeling in Digital CDR with Quantization Noise Analysis. - Sanaz Salem; Mohsen Saneei; Dariush Abbasi-Moghadam (Circuits Syst. Signal Process., 2021)

Evaluation of multi-level Bang-Bang phase detector with metastability effect using Markov chain. - Sanaz Salem; Mohsen Saneei; Dariush Abbasi-Moghadam (Microelectron. J., 2021)