Hierarchical Built-in Self-testing and FPGA Based Healing Methodology for System-on-a-Chip. - Sandeep K. Venishetti; Ali Akoglu; Rahul Kalra (AHS, 2007)

A Highly Parallel FPGA based IEEE-754 Compliant Double-Precision Binary Floating-Point Multiplication Algorithm. - Sandeep K. Venishetti; Ali Akoglu (FPT, 2007)

Highly Parallel FPGA Based IEEE-754 Compliant Double-Precision Floating-Point Division. - Sandeep K. Venishetti; Ali Akoglu (ERSA, 2008)