Design and Analysis of Obfuscated Full Adders. - Sandeep Kolla; Ayesha Sk; Sreehari Veeramachaneni; Sk. Noor Mahammad (ICM, 2021)

Logic Locking Designs at Transistor Level for Full Adders. - Sandeep Kolla; Ayesha Sk; Sreehari Veeramachaneni; Sk. Noor Mahammad (iSES, 2022)