An Efficient, High-Throughput Adaptive NoC Router for Large Scale Spiking Neural Network Hardware Implementations. - Snaider Carrillo; Jim Harkin; Liam McDaid; Sandeep Pande; Fearghal Morgan (ICES, 2010)

EMBRACE-SysC for analysis of NoC-based Spiking Neural Network architectures. - Sandeep Pande; Fearghal Morgan; Seamus Cawley; Brian McGinley; Snaider Carrillo; Jim Harkin; Liam McDaid (SoC, 2010)

Adaptive Routing Strategies for Large Scale Spiking Neural Network Hardware Implementations. - Snaider Carrillo; Jim Harkin; Liam McDaid; Sandeep Pande; Seamus Cawley; Fearghal Morgan (ICANN (1), 2011)

Addressing the Hardware Resource Requirements of Network-on-chip based Neural Architectures. - Sandeep Pande; Fearghal Morgan; Seamus Cawley; Brian McGinley; Jim Harkin; Snaider Carrillo; Liam McDaid (IJCCI (NCTA), 2011)

Hardware spiking neural network prototyping and application. - Seamus Cawley; Fearghal Morgan; Brian McGinley; Sandeep Pande; Liam McDaid; Snaider Carrillo; Jim Harkin (Genet. Program. Evolvable Mach., 2011)

Hierarchical Network-on-Chip and Traffic Compression for Spiking Neural Network Implementations. - Snaider Carrillo; Jim Harkin; L. J. McDaid; Sandeep Pande; Seamus Cawley; Brian McGinley; Fearghal Morgan (NOCS, 2012)

Advancing interconnect density for spiking neural network hardware implementations using traffic-aware adaptive network-on-chip routers. - Snaider Carrillo; Jim Harkin; Liam McDaid; Sandeep Pande; Seamus Cawley; Brian McGinley; Fearghal Morgan (Neural Networks, 2012)

Modular Neural Tile Architecture for Compact Embedded Hardware Spiking Neural Network. - Sandeep Pande; Fearghal Morgan; Seamus Cawley; Tom M. Bruintjes; Gerard J. M. Smit; Brian McGinley; Snaider Carrillo; Jim Harkin; Liam McDaid (Neural Process. Lett., 2013)

Fixed latency on-chip interconnect for hardware spiking neural network architectures. - Sandeep Pande; Fearghal Morgan; Gerard J. M. Smit; Tom M. Bruintjes; Jochem H. Rutgers; Brian McGinley; Seamus Cawley; Jim Harkin; Liam McDaid (Parallel Comput., 2013)

Scalable Hierarchical Network-on-Chip Architecture for Spiking Neural Network Hardware Implementations. - Snaider Carrillo; Jim Harkin; Liam McDaid; Fearghal Morgan; Sandeep Pande; Seamus Cawley; Brian McGinley (IEEE Trans. Parallel Distributed Syst., 2013)

Rapid application prototyping for hardware modular spiking neural network architectures. - Sandeep Pande; Fearghal Morgan; Finn Krewer; Jim Harkin; Liam McDaid; Brian McGinley (Neural Comput. Appl., 2017)

Power-Accuracy Trade-Offs for Heartbeat Classification on Neural Networks Hardware. - Adarsha Balaji; Federico Corradi; Anup Das 001; Sandeep Pande; Siebren Schaafsma; Francky Catthoor (J. Low Power Electron., 2018)

Applications of Computation-In-Memory Architectures based on Memristive Devices. - Said Hamdioui; Hoang Anh Du Nguyen; Mottaqiallah Taouil; Abu Sebastian; Manuel Le Gallo; Sandeep Pande; Siebren Schaafsma; Francky Catthoor; Shidhartha Das; Fernando García-Redondo; Geethan Karunaratne; Abbas Rahimi; et al. (DATE, 2019)

ECG-based Heartbeat Classification in Neuromorphic Hardware. - Federico Corradi; Sandeep Pande; Jan Stuijt; Ning Qiao; Siebren Schaafsma; Giacomo Indiveri; Francky Catthoor (IJCNN, 2019)