A Timestamp-based Cache Coherence Scheme. - Sang Lyul Min; Jean-Loup Baer (ICPP (1), 1989)

A Design of Performance-optimized Control-based Synchronization. - Sang Lyul Min; Yarsun Hsu; Hyoung-Joo Kim (CONPAR, 1990)

A Performance Comparison of Directory-based and Timestamp-based Cache Coherence Schemes. - Sang Lyul Min; Jean-Loup Baer (ICPP (1), 1990)

An efficient caching support for critical sections in large-scale shared-memory multiprocessors. - Sang Lyul Min; Jean-Loup Baer; Hyoung-Joo Kim (ICS, 1990)

An Efficient Cache-Based Access Anomaly Detection Scheme. - Sang Lyul Min; Jong-Deok Choi (ASPLOS, 1991)

Race Frontier: Reproducing Data Races in Parallel-Program Debugging. - Jong-Deok Choi; Sang Lyul Min (PPoPP, 1991)

Design and Analysis of a Scalable Cache Coherence Scheme Based on Clocks and Timestamps. - Sang Lyul Min; Jean-Loup Baer (IEEE Trans. Parallel Distributed Syst., 1992)

A Dual-Mode Instruction Prefetch Scheme for Improved Worst Case and Average Case Program Execution Times. - Minsuk Lee; Sang Lyul Min; Chang Yun Park; Young Hyun Bae; Heonshik Shin; Chong-Sang Kim (RTSS, 1993)

Caller ID System in the Internet Environment. - Hyun Tae Jung; Haelyong Kim; Yang-Min Seo; Ghun Choe; Sang Lyul Min; Chong-Sang Kim; Kern Koh (USENIX Security Symposium, 1993)

Threaded prefetching: An adaptive instruction prefetch mechanism. - Seong Baeg Kim; Myung Soon Park; Sun-Ho Park; Sang Lyul Min; Heonshik Shin; Chong-Sang Kim; Deog-Kyoon Jeong (Microprocess. Microprogramming, 1993)

V-P cache: a storage efficient virtual cache organization. - Sang Lyul Min; Jesung Kim; Chong-Sang Kim; Heonshik Shin; Deog-Kyoon Jeong (Microprocess. Microsystems, 1993)

An Accurate Worst Case Timing Analysis Technique for RISC Processors. - Sung-Soo Lim; Young Hyun Bae; Gyu Tae Jang; Byung-Do Rhee; Sang Lyul Min; Chang Yun Park; Heonshik Shin; Kunsoo Park; Chong-Sang Kim (RTSS, 1994)

Cache-Based Data Distribution Constrained Scheduling. - Sang Lyul Min; Jae H. Nam; Myung Soon Park; Jean-Loup Baer (Int. J. High Speed Comput., 1994)

A worst case timing analysis technique for instruction prefetch buffers. - Minsuk Lee; Sang Lyul Min; Chong-Sang Kim (Microprocess. Microprogramming, 1994)

U-Cache: A Cost-Effective Solution to the Synonym Problem. - Jesung Kim; Sang Lyul Min; Sanghoon Jeon 002; ByoungChul Ahn; Deog-Kyoon Jeong; Chong-Sang Kim (HPCA, 1995)

Worst Case Timing Analysis of RISC Processors: R3000/R3010 Case Study. - Yerang Hur; Young Hyun Bae; Sung-Soo Lim; Sung-Kwan Kim; Byung-Do Rhee; Sang Lyul Min; Chang Yun Park; Heonshik Shin; Chong-Sang Kim (RTSS, 1995)

An Accurate Worst Case Timing Analysis for RISC Processors. - Sung-Soo Lim; Young Hyun Bae; Gyu Tae Jang; Byung-Do Rhee; Sang Lyul Min; Chang Yun Park; Heonshik Shin; Kunsoo Park; Soo-Mook Moon; Chong-Sang Kim (IEEE Trans. Software Eng., 1995)

Efficient worst case timing analysis of data caching. - Sung-Kwan Kim; Sang Lyul Min; Rhan Ha (IEEE Real Time Technology and Applications Symposium, 1996)

Efficiently supporting hard/soft deadline transactions in real-time database systems. - Chang-Gun Lee; Young-Kuk Kim; Sang Hyuk Son; Sang Lyul Min; Chong-Sang Kim (RTCSA, 1996)

Analysis of cache-related preemption delay in fixed-priority preemptive scheduling. - Chang-Gun Lee; Joosun Hahn; Sang Lyul Min; Rhan Ha; Seongsoo Hong; Chang Yun Park; Minsuk Lee; Chong-Sang Kim (RTSS, 1996)

Enhanced analysis of cache-related preemption delay in fixed-priority preemptive scheduling. - Chang-Gun Lee; Joosun Hahn; Yang-Min Seo; Sang Lyul Min; Rhan Ha; Seongsoo Hong; Chang Yun Park; Minsuk Lee; Chong-Sang Kim (RTSS, 1997)

The Working Set Algorithm has Competitive Ratio Less Than Two. - Kunsoo Park; Sang Lyul Min; Yookun Cho (Inf. Process. Lett., 1997)

Cache performance improvement through on-demand, in-cache page clearing. - Tae-Jin Kim; Jong Min Kim; Sang Lyul Min; Chong-Sang Kim; Soo-Mook Moon; Seongsoo Hong (Microprocess. Microsystems, 1997)

Threaded Prefetching: A New Instruction Memory Hierarchy for Real-Time Systems. - Minsuk Lee; Sang Lyul Min; Heonshik Shin; Chong-Sang Kim; Chang Yun Park (Real Time Syst., 1997)

An Adaptive Block Management Scheme Using On-Line Detection of Block Reference Patterns. - Jongmoo Choi; Sam H. Noh; Sang Lyul Min; Yookun Cho (IW-MMDBMS, 1998)

Limited Preemptible Scheduling to Embrace Cache Memory in Real-Time Systems. - Sheayun Lee; Chang-Gun Lee; Minsuk Lee; Sang Lyul Min; Chong-Sang Kim (LCTES, 1998)

A Worst Case Timing Analysis Technique for Optimized Programs. - Sung-Soo Lim; Jihong Kim 001; Sang Lyul Min (RTCSA, 1998)

A Worst Case Timing Analysis Technique for Multiple-Issue Machines. - Sung-Soo Lim; Jung Hee Han; Jihong Kim 001; Sang Lyul Min (RTSS, 1998)

U-cache: A cost-effective solution to the virtual cache synonym problem. - Jesung Kim; Sang Lyul Min; Chong-Sang Kim (Microprocess. Microsystems, 1998)

Analysis of Cache-Related Preemption Delay in Fixed-Priority Preemtive Scheduling. - Chang-Gun Lee; Joosun Hahn; Yang-Min Seo; Sang Lyul Min; Rhan Ha; Seongsoo Hong; Chang Yun Park; Minsuk Lee; Chong-Sang Kim (IEEE Trans. Computers, 1998)

Worst Case Timing Requirement of Real-Time Tasks with Time Redundancy. - Hyosoon Lee; Heonshik Shin; Sang Lyul Min (RTCSA, 1999)

Analysis of the Impacts of Overestimation Sources on the Accuracy of Worst Case Timing Analysis. - Sung-Kwan Kim; Sang Lyul Min; Rhan Ha (RTSS, 1999)

On the Existence of a Spectrum of Policies that Subsumes the Least Recently Used (LRU) and Least Frequently Used (LFU) Policies. - Donghee Lee 001; Jongmoo Choi; Jong-Hun Kim; Sam H. Noh; Sang Lyul Min; Yookun Cho; Chong-Sang Kim (SIGMETRICS, 1999)

An Implementation Study of a Detection-Based Adaptive Block Replacement Scheme. - Jongmoo Choi; Sam H. Noh; Sang Lyul Min; Yookun Cho (USENIX ATC, General Track, 1999)

Using Full Reference History for Efficient Document Replacement in Web Caches. - Hyokyung Bahn; Sam H. Noh; Sang Lyul Min; Kern Koh (USENIX Symposium on Internet Technologies and Systems, 1999)

Cache-Conscious Limited Preemptive Scheduling. - Sheayun Lee; Sang Lyul Min; Chong-Sang Kim; Chang-Gun Lee; Minsuk Lee (Real Time Syst., 1999)

A Low-Overhead, High-Performance Unified Buffer Management Scheme That Exploits Sequential and Looping References. - Jong Min Kim; Jongmoo Choi; Jesung Kim; Sam H. Noh; Sang Lyul Min; Yookun Cho; Chong-Sang Kim (OSDI, 2000)

Towards application/file-level characterization of block references: a case for fine-grained buffer management. - Jongmoo Choi; Sam H. Noh; Sang Lyul Min; Yookun Cho (SIGMETRICS, 2000)

A predictive call admission control scheme for low Earth orbit satellite networks. - Byoung Wan Kim; Sang Lyul Min; Hyun Suk Yang; Chong-Sang Kim (IEEE Trans. Veh. Technol., 2000)

Performance Evaluation of the Bluetooth-Based Public Internet Access Point. - Yujin Lim; Jesung Kim; Sang Lyul Min; Joong Soo Ma (ICOIN, 2001)

An Accurate Instruction-Level Energy Consumption Model for Embedded RISC Processors. - Sheayun Lee; Andreas Ermedahl; Sang Lyul Min; Naehyuck Chang (OM@PLDI, 2001)

LRFU: A Spectrum of Policies that Subsumes the Least Recently Used and Least Frequently Used Policies. - Donghee Lee 001; Jongmoo Choi; Jong-Hun Kim; Sam H. Noh; Sang Lyul Min; Yookun Cho; Chong-Sang Kim (IEEE Trans. Computers, 2001)

Bounding Cache-Related Preemption Delay for Real-Time Systems. - Chang-Gun Lee; Kwangpo Lee; Joosun Hahn; Yang-Min Seo; Sang Lyul Min; Rhan Ha; Seongsoo Hong; Chang Yun Park; Minsuk Lee; Chong-Sang Kim (IEEE Trans. Software Eng., 2001)

A Dynamic Voltage Scaling Algorithm for Dynamic-Priority Hard Real-Time Systems Using Slack Time Analysis. - Woonseok Kim; Jihong Kim 001; Sang Lyul Min (DATE, 2002)

On Relaxing Task Isolation in Overrun Handling to Provide Probabilistic Guarantees to Soft Real-Time Tasks with Varying Execution Times. - Kanghee Kim; Lucia Lo Bello; Sang Lyul Min; Orazio Mirabella (ECRTS, 2002)

Buffer Cache Management: Predicting the Future from the Past. - Jinhyuk Yoon; Sang Lyul Min; Yookun Cho (ISPAN, 2002)

SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms. - Dongkun Shin; Woonseok Kim; Jaekwon Jeon; Jihong Kim 001; Sang Lyul Min (PACS, 2002)

Performance Comparison of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems. - Woonseok Kim; Dongkun Shin; Han-Saem Yun; Jihong Kim 001; Sang Lyul Min (IEEE Real Time Technology and Applications Symposium, 2002)

Stochastic Analysis of Periodic Real-Time Systems. - José Luis Díaz; Daniel F. García; Kanghee Kim; Chang-Gun Lee; Lucia Lo Bello; José María López; Sang Lyul Min; Orazio Mirabella (RTSS, 2002)

Embedded System Design Framework for Minimizing Code Size and Guaranteeing Real-Time Requirements. - Insik Shin; Insup Lee 001; Sang Lyul Min (RTSS, 2002)

Replica-aware caching for Web proxies. - Hyokyung Bahn; Hyunsook Lee; Sam H. Noh; Sang Lyul Min; Kern Koh (Comput. Commun., 2002)

Efficient Replacement of Nonuniform Objects in Web Caches. - Hyokyung Bahn; Kern Koh; Sang Lyul Min; Sam H. Noh (Computer, 2002)

Analysis of Worst Case DMA Response Time in a Fixed-Priority Bus Arbitration Protocol. - Joosun Hahn; Rhan Ha; Sang Lyul Min; Jane W.-S. Liu (Real Time Syst., 2002)

Design, Implementation, and Performance Evaluation of a Detection-Based Adaptive Block Replacement Scheme. - Jongmoo Choi; Sam H. Noh; Sang Lyul Min; Eun-Yong Ha; Yookun Cho (IEEE Trans. Computers, 2002)

A space-efficient flash translation layer for CompactFlash systems. - Jesung Kim; Jong Min Kim; Sam H. Noh; Sang Lyul Min; Yookun Cho (IEEE Trans. Consumer Electron., 2002)

Dynamic voltage scaling algorithm for fixed-priority real-time systems using work-demand analysis. - Woonseok Kim; Jihong Kim 001; Sang Lyul Min (ISLPED, 2003)

Code Generation for a Dual Instruction Set Processor Based on Selective Code Transformation. - Sheayun Lee; Jaejin Lee; Sang Lyul Min; Jason Hiser; Jack W. Davidson (SCOPES, 2003)

A Flexible Tradeoff between Code Size and WCET Employing Dual Instruction Set Processors. - Sheayun Lee; Jaejin Lee; Chang Yun Park; Sang Lyul Min (WCET, 2003)

An accurate and practical buffer allocation model for the buffer cache based on marginal gains. - Jong Min Kim; Donghee Lee 001; Sam H. Noh; Sang Lyul Min; Yookun Cho; Chong-Sang Kim (Inf. Process. Lett., 2003)

Compiler-assisted demand paging for embedded systems with flash memory. - Chanik Park; Junghee Lim; Kiwon Kwon; Jaejin Lee; Sang Lyul Min (EMSOFT, 2004)

Preemption-aware dynamic voltage scaling in hard real-time systems. - Woonseok Kim; Jihong Kim 001; Sang Lyul Min (ISLPED, 2004)

A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor. - Sheayun Lee; Jaejin Lee; Chang Yun Park; Sang Lyul Min (SCOPES, 2004)

Performance Evaluation of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems. - Woonseok Kim; Dongkun Shin; Han-Saem Yun; Jihong Kim 001; Sang Lyul Min (J. Low Power Electron., 2005)

An Exact Stochastic Analysis of Priority-Driven Periodic Real-Time Systems and Its Approximations. - Kanghee Kim; José Luis Díaz; Lucia Lo Bello; José María López; Chang-Gun Lee; Sang Lyul Min (IEEE Trans. Computers, 2005)

Current trends in flash memory technology: invited paper. - Sang Lyul Min; Eyee Hyun Nam (ASP-DAC, 2006)

A dynamic code placement technique for scratchpad memory using postpass optimization. - Bernhard Egger 002; Chihun Kim; Choonki Jang; Yoonsung Nam; Jaejin Lee; Sang Lyul Min (CASES, 2006)

Evolution of NAND Flash Memory Interface. - Sang Lyul Min; Eyee Hyun Nam; Young Hee Lee (Asia-Pacific Computer Systems Architecture Conference, 2007)

Virtual framework for testing the reliability of system software on embedded systems. - Sung-Kwan Kim; Jongmoo Choi; Donghee Lee 001; Sam H. Noh; Sang Lyul Min (SAC, 2007)

Flash memory-based storage device for mobile embedded applications. - Jin-Yong Choi; Ki Seok Choi 001; Sung-Kwan Kim; Sookwan Lee; Eyee Hyun Nam; JiHyuck Yun; Sang Lyul Min; Yookun Cho (SMC, 2007)

Design, Implementation, and Performance Evaluation of Flash Memory-based File System on Chip. - Seongjun Ahn; Jongmoo Choi; Donghee Lee 001; Sam H. Noh; Sang Lyul Min; Yookun Cho (J. Inf. Sci. Eng., 2007)

Selective code transformation for dual instruction set processors. - Sheayun Lee; Jaejin Lee; Chang Yun Park; Sang Lyul Min (ACM Trans. Embed. Comput. Syst., 2007)

Stochastic Analysis of Priority-Driven Periodic Real-Time Systems. - Orazio Mirabella; José María López; José Luis Díaz; Lucia Lo Bello; Kanghee Kim; Daniel F. García; Sang Lyul Min; Chang-Gun Lee (Handbook of Real-Time and Embedded Systems, 2007)

LTFTL: lightweight time-shift flash translation layer for flash memory based embedded storage. - Kyoungmoon Sun; Seungjae Baek; Jongmoo Choi; Donghee Lee 001; Sam H. Noh; Sang Lyul Min (EMSOFT, 2008)

Development Platforms for Flash Memory Solid State Disks. - Hongseok Kim; Eyee Hyun Nam; Ki Seok Choi 001; Yoon Jae Seong; Jin-Yong Choi; Sang Lyul Min (ISORC, 2008)

Flash memory-based development platform for homecare devices. - Joon Ho Um; Bryan Suk Joon Kim; Sung Gab Lee; Eyee Hyun Nam; Sang Lyul Min (SMC, 2008)

Chameleon: A High Performance Flash/FRAM Hybrid Solid State Disk Architecture. - Jinhyuk Yoon; Eyee Hyun Nam; Yoon Jae Seong; Hongseok Kim; Bryan Suk Kim; Sang Lyul Min; Yookun Cho (IEEE Comput. Archit. Lett., 2008)

Introduction to embedded systems week 2006 special issue. - Soonhoi Ha; Kiyoung Choi; Taewhan Kim; Krisztián Flautner; Sang Lyul Min; Wang Yi 001 (ACM Trans. Embed. Comput. Syst., 2008)

A design framework for real-time embedded systems with code size and energy constraints. - Sheayun Lee; Insik Shin; Woonseok Kim; Insup Lee 001; Sang Lyul Min (ACM Trans. Embed. Comput. Syst., 2008)

Hardware Platforms for Flash Memory/NVRAM Software Development. - Eyee Hyun Nam; Ki Seok Choi 001; Jin-Yong Choi; Hang Jun Min; Sang Lyul Min (J. Comput. Sci. Eng., 2009)

A Flash-Aware Cluster Allocation Scheme for Legacy File Systems. - Sung-Kwan Kim; Hunki Kwon; Donghee Lee 001; Sam H. Noh; Sang Lyul Min (J. Inf. Sci. Eng., 2009)

Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU. - Bernhard Egger 002; Seungkyun Kim; Choonki Jang; Jaejin Lee; Sang Lyul Min; Heonshik Shin (IEEE Trans. Computers, 2010)

Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture. - Yoon Jae Seong; Eyee Hyun Nam; Jinhyuk Yoon; Hongseok Kim; Jin-Yong Choi; Sookwan Lee; Young Hyun Bae; Jaejin Lee; Yookun Cho; Sang Lyul Min (IEEE Trans. Computers, 2010)

Hardware/software architecture for flash memory storage systems. - Sang Lyul Min; Eyee Hyun Nam (CASES, 2011)

Ozone (O3): An Out-of-Order Flash Memory Controller Architecture. - Eyee Hyun Nam; Bryan Suk Joon Kim; Hyeonsang Eom; Sang Lyul Min (IEEE Trans. Computers, 2011)

Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations. - Seungkyun Kim; Kiwon Kwon; Chihun Kim; Choonki Jang; Jaejin Lee; Sang Lyul Min (ACM Trans. Embed. Comput. Syst., 2011)

An Abstract Fault Model for NAND Flash Memory. - JiHyuck Yun; Jinhyuk Yoon; Eyee Hyun Nam; Sang Lyul Min (IEEE Embed. Syst. Lett., 2012)

Energy-centric DVFS controlling method for multi-core platforms. - Shin Gyu Kim; Hyeonsang Eom; Heon Y. Yeom; Sang Lyul Min (Computing, 2014)

Copycat: A High Precision Real Time NAND Simulator. - Juyong Shin; Jongbo Bae; Ansu Na; Sang Lyul Min (CoRR, 2016)

Framework for efficient and flexible scheduling of flash memory operations. - Bryan Suk Kim; Yonggun Lee; Sang Lyul Min (NVMSA, 2017)

QoS-Aware Flash Memory Controller. - Bryan Suk Kim; Sang Lyul Min (RTAS, 2017)

FMMU: A Hardware-Automated Flash Map Management Unit for Scalable Performance of NAND Flash-Based SSDs. - Yeong-Jae Woo; Sang Lyul Min (CoRR, 2017)

P-BMS: A Bad Block Management Scheme in Parallelized Flash Memory Storage Devices. - Hongseok Kim; Eyee Hyun Nam; JiHyuck Yun; Sheayun Lee; Sang Lyul Min (ACM Trans. Embed. Comput. Syst., 2017)

An Empirical Study on NVM-based Block I/O Caches. - Geonhee Lee; Hyeon Gyu Lee; Juwon Lee; Bryan S. Kim; Sang Lyul Min (APSys, 2018)

FMMU: a hardware-accelerated flash map management unit for scalable performance of flash-based SSDs. - Yeong-Jae Woo; Sheayun Lee; Sang Lyul Min (DAC, 2018)

AutoSSD: an Autonomic SSD Architecture. - Bryan Suk Kim; Hyun Suk Yang; Sang Lyul Min (USENIX ATC, 2018)

HIL: A Framework for Compositional FTL Development and Provably-Correct Crash Recovery. - Jin-Yong Choi; Eyee Hyun Nam; Yoon Jae Seong; Jinhyuk Yoon; Sookwan Lee; Hongseok Kim; Jeongsu Park; Yeong-Jae Woo; Sheayun Lee; Sang Lyul Min (ACM Trans. Storage, 2018)

Design Tradeoffs for SSD Reliability. - Bryan S. Kim; Jongmoo Choi; Sang Lyul Min (FAST, 2019)

CPR for SSDs. - Bryan S. Kim; Eunji Lee; Sungjin Lee 001; Sang Lyul Min (HotOS, 2019)

SpartanSSD: a Reliable SSD under Capacitance Constraints. - Hyeon Gyu Lee; Juwon Lee; Minwook Kim; Donghwa Shin; Sungjin Lee 001; Bryan S. Kim; Eunji Lee; Sang Lyul Min (ISLPED, 2021)

Learned Performance Model for SSD. - Hyeon Gyu Lee; Minwook Kim; Juwon Lee; Eunji Lee; Bryan S. Kim; Sungjin Lee 001; Yeseong Kim; Sang Lyul Min; Jin-Soo Kim 001 (IEEE Comput. Archit. Lett., 2021)