A range-scaled 13b 100MS/s 0.13μm CMOS SHA-free ADC based on a single reference. - Dong-Hyun Hwang; Jung-Eun Song; Sang-Pil Nam; Hyo-Jin Kim; Tai-Ji An; Kwang-Soo Kim; Seung-Hoon Lee 006 (ISOCC, 2011)

A 10b 1MS/s-to-10MS/s 0.11um CMOS SAR ADC for analog TV applications. - Sang-Pil Nam; Yongmin Kim; Dong-Hyun Hwang; Hyo-Jin Kim; Tai-Ji An; Jun-Sang Park; Suk-Hee Cho; Gil-Cho Ahn; Seung-Hoon Lee 006 (ISOCC, 2012)

A noise-immune stylus analog front-end using adjustable frequency modulation and linear-interpolating data reconstruction for both electrically coupled resonance and active styluses. - Kyung-Hoon Lee; Sang-Pil Nam; Jung-Ho Lee; Michael Choi; Hyungjong Ko; San-Ho Byun; Jin-chul Lee; Yong-Hoon Lee; Yeong-Cheol Rhee; Yoon-Kyung Choi; Byunghoon Kang; Changbyung Park; et al. (ISSCC, 2018)

A 12-bit 8GS/s RF Sampling DAC with Code-Dependent Nonlinearity Compensation and Intersegmental Current-Mismatch Calibration in 5nm FinFET. - Byeongwoo Koo; Sunghan Do; Sang-Pil Nam; Heewook Shin; Sungno Lee; Eunhye Oh; Jaemin Hong; Jung-Ho Lee; Youngjae Cho; Michael Choi; Jongshin Shin (VLSI Technology and Circuits, 2022)

A 12-bit 16GS/s Single-Channel RF-DAC with Hybrid Segmentation for Digital Back-Off and Code-Dependent Free Switch Driver Achieving -85dBc IMD3 in 5nm FinFET. - Byeongwoo Koo; Sunghan Do; Sangkyu Lee; Sang-Pil Nam; Heewook Shin; Saemin Im; Hyochul Shin; Sungno Lee; Junsang Park; Jungho Lee; Youngjae Cho; Michael Choi; et al. (VLSI Technology and Circuits, 2024)