A Novel Approach for Semiconductor Etching Process with Inductive Biases. - Sanghoon Myung; Hyunjae Jang; Byungseon Choi; Jisu Ryu; Hyuk Kim; Sang Wuk Park; Changwook Jeong; Daesin Kim (CoRR, 2021)

Highly manufacturable Self-Aigned Direct Backside Contact (SA-DBC) and Backside Gate Contact (BGC) for 3-dimensional Stacked FET at 48nm gate pitch. - Jaehyun Park; Juhun Park; Kyuman Hwang; Jinchan Yun; Dahye Kim; Sungil Park; Jejune Park; Jinwook Yang; Jae Won Jeong; Chuljin Yun; Jinho Bae; Sam Park; et al. (VLSI Technology and Circuits, 2024)