Voltage Boosted Fail Detecting Circuit for Selective Write Assist and Cell Current Boosting for High-Density Low-Power SRAM. - Jaehyun Park 014; Sangheon Lee 005; Hanwool Jeong (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Cross-Coupled nFET Preamplifier for Low Voltage SRAM. - Sangheon Lee 005; Jaehyun Park 014; Hanwool Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Design of High-Speed, Low-Power Sensing Circuits for Nano-Scale Embedded Memory. - Sangheon Lee 005; Gwanwoo Park; Hanwool Jeong (Sensors, 2024)

Simultaneous Optimization of Various-Sized SRAM Instances Through Machine Learning-Driven Transistor Sizing and Leafcell Circuit Pool Construction. - Seokhun Kim; Junseo Lee; Dongho Kim; Jihwan Park; Sangheon Lee 005; Hanwool Jeong (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

Bayesian Learning-Enhanced Embedded Memory Design With Automated Circuit Variant Generation. - Dongho Kim; Junseo Lee; Seokhun Kim; Jihwan Park; Sangheon Lee 005; Hanwool Jeong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)