An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory. - Sang-Il Han; Amer Baghdadi; Marius Bonaciu; Soo-Ik Chae; Ahmed Amine Jerraya (DAC, 2004)

Functional modeling techniques for efficient SW code generation of video codec applications. - Sang-Il Han; Soo-Ik Chae; Ahmed Amine Jerraya (ASP-DAC, 2006)

Buffer memory optimization for video codec application modeled in Simulink. - Sang-Il Han; Xavier Guerin; Soo-Ik Chae; Ahmed Amine Jerraya (DAC, 2006)

Simulink-Based MPSoC Design Flow: Case Study of Motion-JPEG and H.264. - Kai Huang 002; Sang-Il Han; Katalin Popovici; Lisane B. de Brisolara; Xavier Guerin; Lei Li; Xiaolang Yan; Soo-Ik Chae; Luigi Carro; Ahmed Amine Jerraya (DAC, 2007)

Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC. - Lisane B. de Brisolara; Sang-Il Han; Xavier Guerin; Luigi Carro; Ricardo Reis 001; Soo-Ik Chae; Ahmed Amine Jerraya (SCOPES, 2007)

Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC. - Sang-Il Han; Soo-Ik Chae; Lisane B. de Brisolara; Luigi Carro; Ricardo Reis 001; Xavier Guerin; Ahmed Amine Jerraya (Des. Autom. Embed. Syst., 2007)

Simulink®-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation. - Sang-Il Han; Soo-Ik Chae; Lisane B. de Brisolara; Luigi Carro; Katalin Popovici; Xavier Guerin; Ahmed Amine Jerraya; Kai Huang 002; Lei Li; Xiaolang Yan (Integr., 2009)

Reliability of Industrial grade Embedded-STT-MRAM. - Yongsung Ji; Hyunjae Goo; Jungman Lim; Tae-Young Jeong; Taiki Uemura; Gun Rae Kim; Boil Seo; Seungbae Lee; Goeun Park; Jeongmin Jo; Sang-Il Han; Kilho Lee; et al. (IRPS, 2020)

Control the Information of the Image with Anisotropic Diffusion and Isotropic Diffusion for the Image Classification. - Hyun-Tae Choi; Nahyun Lee; Jewon No; Sangil Han; Jaeho Tak; Hwijin Kim; Haegang Lee; Seonghoon Ham; Byung-Woo Hong (MMBD/MLIS, 2021)

Robust SVD Made Easy: A fast and reliable algorithm for large-scale data analysis. - Sangil Han; Sungkyu Jung; Kyoowon Kim (AISTATS, 2024)

Constrained Sorter Design using Zero-One Principle. - Sangil Han; Jaehee Kim; Dongyun Kam; Byeong Yong Kong; Mijung Kim; Young-Seok Kim; Youngjoo Lee (ISCAS, 2024)

Splitting of Composite Neural Networks via Proximal Operator With Information Bottleneck. - Sang-Il Han; Kensuke Nakamura 001; Byung-Woo Hong (IEEE Access, 2024)

A Design Framework for Cost-Efficient Sorters With Arbitrary Input/Output Constraints. - Jaehee Kim; Sangil Han; Dongyun Kam; Byeong Yong Kong; Youngjoo Lee (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Subspace Recovery in Winsorized PCA: Insights into Accuracy and Robustness. - Sangil Han; Kyoowon Kim; Sungkyu Jung (AISTATS, 2025)