UNPU: A 50.6TOPS/W unified deep neural network accelerator with 1b-to-16b fully-variable weight bit-precision. - Jinmook Lee; Changhyeon Kim; Sanghoon Kang; Dongjoo Shin; Sangyeob Kim; Hoi-Jun Yoo (ISSCC, 2018)

A 15.2 TOPS/W CNN Accelerator with Similar Feature Skipping for Face Recognition in Mobile Devices. - Sangyeob Kim; Juhyoung Lee; Sanghoon Kang; Jinsu Lee; Hoi-Jun Yoo (ISCAS, 2019)

UNPU: An Energy-Efficient Deep Neural Network Accelerator With Fully Variable Weight Bit Precision. - Jinmook Lee; Changhyeon Kim; Sanghoon Kang; Dongjoo Shin; Sangyeob Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2019)

A 54.7 fps 3D Point Cloud Semantic Segmentation Processor with Sparse Grouping Based Dilated Graph Convolutional Network for Mobile Devices. - Sangjin Kim; Sangyeob Kim; Juhyoung Lee; Hoi-Jun Yoo (ISCAS, 2020)

7.4 GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity Exploitation. - Sanghoon Kang; Donghyeon Han; Juhyoung Lee; Dongseok Im; Sangyeob Kim; Soyeon Kim; Hoi-Jun Yoo (ISSCC, 2020)

A 146.52 TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping. - Sangyeob Kim; Juhyoung Lee; Sanghoon Kang; Jinmook Lee; Hoi-Jun Yoo (VLSI Circuits, 2020)

A Power-Efficient CNN Accelerator With Similar Feature Skipping for Face Recognition in Mobile Devices. - Sangyeob Kim; Juhyoung Lee; Sanghoon Kang; Jinsu Lee; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020)

Energy-Efficient Deep Reinforcement Learning Accelerator Designs for Mobile Autonomous Systems. - Juhyoung Lee; Changhyeon Kim; Donghyeon Han; Sangyeob Kim; Sangjin Kim; Hoi-Jun Yoo (AICAS, 2021)

An Energy-efficient Floating-Point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory. - Juhyoung Lee; Jihoon Kim 004; Wooyoung Jo; Sangyeob Kim; Sangjin Kim; Donghyeon Han; Jinsu Lee; Hoi-Jun Yoo (HCS, 2021)

OmniDRL: An Energy-Efficient Mobile Deep Reinforcement Learning Accelerators with Dual-mode Weight Compression and Direct Processing of Compressed Data. - Juhyoung Lee; Sangyeob Kim; Ji-Hoon Kim 004; Sangjin Kim; Wooyoung Jo; Donghyeon Han; Hoi-Jun Yoo (HCS, 2021)

A 13.7 TFLOPS/W Floating-point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory. - Juhyoung Lee; Jihoon Kim 004; Wooyoung Jo; Sangyeob Kim; Sangjin Kim; Jinsu Lee; Hoi-Jun Yoo (VLSI Circuits, 2021)

OmniDRL: A 29.3 TFLOPS/W Deep Reinforcement Learning Processor with Dualmode Weight Compression and On-chip Sparse Weight Transposer. - Juhyoung Lee; Sangyeob Kim; Sangjin Kim; Wooyoung Jo; Donghyeon Han; Jinsu Lee; Hoi-Jun Yoo (VLSI Circuits, 2021)

GST: Group-Sparse Training for Accelerating Deep Reinforcement Learning. - Juhyoung Lee; Sangyeob Kim; Sangjin Kim; Wooyoung Jo; Hoi-Jun Yoo (CoRR, 2021)

GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs With Speculative Dual-Sparsity Exploitation. - Sanghoon Kang; Donghyeon Han; Juhyoung Lee; Dongseok Im; Sangyeob Kim; Soyeon Kim; Junha Ryu; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2021)

An Energy-Efficient GAN Accelerator With On-Chip Training for Domain-Specific Optimization. - Soyeon Kim; Sanghoon Kang; Donghyeon Han; Sangjin Kim; Sangyeob Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2021)

A 64.1mW Accurate Real-Time Visual Object Tracking Processor With Spatial Early Stopping on Siamese Network. - Soyeon Kim; Sangjin Kim; Sangyeob Kim; Donghyeon Han; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 43.1TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory With Computation Reuse. - Soyeon Um; Sangyeob Kim; Sangjin Kim; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Neuro-CIM: A 310.4 TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing. - Sangyeob Kim; Sangjin Kim; Soyeon Um; Soyeon Kim; Kwantae Kim; Hoi-Jun Yoo (HCS, 2022)

Design of Sub-10-μW Sub-0.1% THD Sinusoidal Current Generator IC for Bio-Impedance Sensing. - Kwantae Kim; Sangyeob Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2022)

OmniDRL: An Energy-Efficient Deep Reinforcement Learning Processor With Dual-Mode Weight Compression and Sparse Weight Transposer. - Juhyoung Lee; Sangyeob Kim; Sangjin Kim; Wooyoung Jo; Ji-Hoon Kim 004; Donghyeon Han; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2022)

ECIM: Exponent Computing in Memory for an Energy-Efficient Heterogeneous Floating-Point DNN Training Processor. - Juhyoung Lee; Jihoon Kim 004; Wooyoung Jo; Sangyeob Kim; Sangjin Kim; Hoi-Jun Yoo (IEEE Micro, 2022)

A Low-Power Graph Convolutional Network Processor With Sparse Grouping for 3D Point Cloud Semantic Segmentation in Mobile Devices. - Sangjin Kim; Sangyeob Kim; Juhyoung Lee; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

TSUNAMI: Triple Sparsity-Aware Ultra Energy-Efficient Neural Network Training Accelerator With Multi-Modal Iterative Pruning. - Sangyeob Kim; Juhyoung Lee; Sanghoon Kang; Donghyeon Han; Wooyoung Jo; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A Resource-Efficient Super-Resolution FPGA Processor with Heterogeneous CNN and SNN Core Architecture. - Jiwon Choi; Sangyeob Kim; Wonhoon Park; Wooyoung Jo; Hoi-Jun Yoo (A-SSCC, 2023)

LOG-CIM: A 116.4 TOPS/W Digital Computing-In-Memory Processor Supporting a Wide Range of Logarithmic Quantization with Zero-Aware 6T Dual-WL Cell. - Soyeon Um; Sangjin Kim; Seongyon Hong; Sangyeob Kim; Hoi-Jun Yoo (A-SSCC, 2023)

A Low-power Neural 3D Rendering Processor with Bio-inspired Visual Perception Core and Hybrid DNN Acceleration. - Donghyeon Han; Junha Ryu; Sangyeob Kim; Sangjin Kim; Jongjun Park; Hoi-Jun Yoo (COOL CHIPS, 2023)

COOL-NPU: Complementary Online Learning Neural Processing Unit with CNN-SNN Heterogeneous Core and Event-driven Backpropagation. - Sangyeob Kim; Soyeon Kim; Seongyon Hong; Sangjin Kim; Donghyeon Han; Jiwon Choi; Hoi-Jun Yoo (COOL CHIPS, 2023)

A 332 TOPS/W Input/Weight-Parallel Computing-in-Memory Processor with Voltage-Capacitance-Ratio Cell and Time-Based ADC. - Seongyon Hong; Soyeon Um; Sangjin Kim; Sangyeob Kim; Wooyoung Jo; Hoi-Jun Yoo (ISCAS, 2023)

A Reconfigurable 1T1C eDRAM-based Spiking Neural Network Computing-In-Memory Processor for High System-Level Efficiency. - Seryeong Kim; Soyeon Kim; Soyeon Um; Sangjin Kim; Zhiyong Li 016; Sangyeob Kim; Wooyoung Jo; Hoi-Jun Yoo (ISCAS, 2023)

MetaVRain: A 133mW Real-Time Hyper-Realistic 3D-NeRF Processor with 1D-2D Hybrid-Neural Engines for Metaverse on Mobile Devices. - Donghyeon Han; Junha Ryu; Sangyeob Kim; Sangjin Kim; Hoi-Jun Yoo (ISSCC, 2023)

C-DNN: A 24.5-85.8TOPS/W Complementary-Deep-Neural-Network Processor with Heterogeneous CNN/SNN Core Architecture and Forward-Gradient-Based Sparsity Generation. - Sangyeob Kim; Soyeon Kim; Seongyon Hong; Sangjin Kim; Donghyeon Han; Hoi-Jun Yoo (ISSCC, 2023)

DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching. - Sangjin Kim; Zhiyong Li 016; Soyeon Um; Wooyoung Jo; Sangwoo Ha; Juhyoung Lee; Sangyeob Kim; Donghyeon Han; Hoi-Jun Yoo (ISSCC, 2023)

NeRPIM: A 4.2 mJ/frame Neural Rendering Processing-in-memory Processor with Space Encoding Block-wise Mapping for Mobile Devices. - Wooyoung Jo; Sangjin Kim; Juhyoung Lee; Donghyeon Han; Sangyeob Kim; Seungyoon Choi; Hoi-Jun Yoo (VLSI Technology and Circuits, 2023)

GPPU: A 330.4-μJ/ task Neural Path Planning Processor with Hybrid GNN Acceleration for Autonomous 3D Navigation. - Seokchan Song; Donghyeon Han; Sangjin Kim; Sangyeob Kim; Gwangtae Park; Hoi-Jun Yoo (VLSI Technology and Circuits, 2023)

A 709.3 TOPS/W Event-Driven Smart Vision SoC with High-Linearity and Reconfigurable MRAM PIM. - Wenao Xie; Haoyang Sang; Beomseok Kwon; Dongseok Im; Sangjin Kim; Sangyeob Kim; Hoi-Jun Yoo (VLSI Technology and Circuits, 2023)

Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital-Analog Networks. - Sangyeob Kim; Sangjin Kim; Soyeon Um; Soyeon Kim; Kwantae Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2023)

SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor With Two-Step Spike Encoding and Shift-and-Accumulation Unit. - Sangyeob Kim; Sangjin Kim; Soyeon Um; Soyeon Kim; Juhyoung Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2023)

C-DNN V2: Complementary Deep-Neural-Network Processor With Full-Adder/OR-Based Reduction Tree and Reconfigurable Spatial Weight Reuse. - Sangyeob Kim; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

DualNet: Efficient Integration of Artificial Neural Network and Spiking Neural Network with Equivalent Conversion. - Seongyon Hong; Sangyeob Kim; Soyeon Kim; Hoi-Jun Yoo (AICAS, 2024)

NoPIM: Functional Network-on-Chip Architecture for Scalable High-Density Processing-in-Memory-based Accelerator. - Sangjin Kim; Zhiyong Li 016; Soyeon Um; Wooyoung Jo; Sangwoo Ha; Sangyeob Kim; Hoi-Jun Yoo (COOL CHIPS, 2024)

A Low-power and Real-time Neural-Rendering Dense SLAM Processor with 3-Level Hierarchical Sparsity Exploitation. - Gwangtae Park; Seokchan Song; Haoyang Sang; Dongseok Im; Donghyeon Han; Sangyeob Kim; Hongseok Lee; Hoi-Jun Yoo (COOL CHIPS, 2024)

A Low-Power Neural Graphics System for Instant 3D Modeling and Real-Time Rendering on Mobile AR/VR Devices. - Junha Ryu; Hankyul Kwon; Wonhoon Park; Zhiyong Li 016; Beomseok Kwon; Donghyeon Han; Dongseok Im; Sangyeob Kim; Hyungnam Joo; Minsung Kim; Hoi-Jun Yoo (COOL CHIPS, 2024)

A Low-Power Large-Language-Model Processor with Big-Little Network and Implicit-Weight-Generation for On-Device AI. - Sangyeob Kim; Sangjin Kim; Wooyoung Jo; Soyeon Kim; Seongyon Hong; Nayeong Lee; Hoi-Jun Yoo (HCS, 2024)

NeuGPU: A Neural Graphics Processing Unit for Instant Modeling and Real-Time Rendering on Mobile AR/VR Devices. - Junha Ryu; Hankyul Kwon; Wonhoon Park; Zhiyong Li 016; Beomseok Kwon; Donghyeon Han; Dongseok Im; Sangyeob Kim; Hyungnam Joo; Minsung Kim; Hoi-Jun Yoo (HCS, 2024)

Space-Mate: A 303.5mW Real-Time NeRF SLAM Processor with Sparse-Mixture-of-Experts-based Acceleration. - Seokchan Song; Haoyang Sang; Dongseok Im; Donghyeon Han; Sangyeob Kim; Hongseok Lee; Hoi-Jun Yoo (HCS, 2024)

Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-Network. - Sangyeob Kim; Sangjin Kim; Soyeon Um; Soyeon Kim; Hoi-Jun Yoo (ISCAS, 2024)

20.5 C-Transformer: A 2.6-18.1μJ/Token Homogeneous DNN-Transformer/Spiking-Transformer Processor with Big-Little Network and Implicit Weight Generation for Large Language Models. - Sangyeob Kim; Sangjin Kim; Wooyoung Jo; Soyeon Kim; Seongyon Hong; Hoi-Jun Yoo (ISSCC, 2024)

20.8 Space-Mate: A 303.5mW Real-Time Sparse Mixture-of-Experts-Based NeRF-SLAM Processor for Mobile Spatial Computing. - Gwangtae Park; Seokchan Song; Haoyang Sang; Dongseok Im; Donghyeon Han; Sangyeob Kim; Hongseok Lee; Hoi-Jun Yoo (ISSCC, 2024)

20.7 NeuGPU: A 18.5mJ/Iter Neural-Graphics Processing Unit for Instant-Modeling and Real-Time Rendering with Segmented-Hashing Architecture. - Junha Ryu; Hankyul Kwon; Wonhoon Park; Zhiyong Li 016; Beomseok Kwon; Donghyeon Han; Dongseok Im; Sangyeob Kim; Hyungnam Joo; Hoi-Jun Yoo (ISSCC, 2024)

Dyamond: A 1T1C DRAM In-memory Computing Accelerator with Compact MAC-SIMD and Adaptive Column Addition Dataflow. - Seongyon Hong; Wooyoung Jo; Sangjin Kim; Sangyeob Kim; Kyomin Sohn; Hoi-Jun Yoo (VLSI Technology and Circuits, 2024)

NeRF-Navi: A 93.6-202.9µJ/task Switchable Approximate-Accurate NeRF Path Planning Processor with Dual Attention Engine and Outlier Bit-Offloading Core. - Seryeong Kim; Seokchan Song; Wonhoon Park; Junha Ryu; Sangyeob Kim; Gwangtae Park; Soyeon Kim; Hoi-Jun Yoo (VLSI Technology and Circuits, 2024)

A Low-Power Artificial-Intelligence-Based 3-D Rendering Processor With Hybrid Deep Neural Network Computing. - Donghyeon Han; Junha Ryu; Sangyeob Kim; Sangjin Kim; Jongjun Park; Hoi-Jun Yoo (IEEE Micro, 2024)

COOL-NPU: Complementary Online Learning Neural Processing Unit. - Sangyeob Kim; Soyeon Kim; Seongyon Hong; Sangjin Kim; Jiwon Choi; Donghyeon Han; Hoi-Jun Yoo (IEEE Micro, 2024)

MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing. - Donghyeon Han; Junha Ryu; Sangyeob Kim; Sangjin Kim; Jongjun Park; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2024)

C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture. - Sangyeob Kim; Soyeon Kim; Seongyon Hong; Sangjin Kim; Donghyeon Han; Jiwon Choi; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2024)

DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell. - Sangjin Kim; Zhiyong Li 016; Soyeon Um; Wooyoung Jo; Sangwoo Ha; Juhyoung Lee; Sangyeob Kim; Donghyeon Han; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2024)

Improved climate time series forecasts by machine learning and statistical models coupled with signature method: A case study with El Niño. - Jonathan Derot; Nozomi Sugiura; Sangyeob Kim; Shinya Kouketsu (Ecol. Informatics, 2024)

LOG-CIM: An Energy-Efficient Logarithmic Quantization Computing-In-Memory Processor With Exponential Parallel Data Mapping and Zero-Aware 6T Dual-WL Cell. - Soyeon Um; Sangjin Kim; Seongyon Hong; Sangyeob Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2024)

A 65.1 TOPS/W Digital CIM Processor for Ultra-Low-Bit Transformers with Multiplexer-based Adder and Scaling Factor-based Reordering. - Nayeong Lee; Sangyeob Kim; Seongyon Hong; Jiwon Choi; Hoi-Jun Yoo (ISCAS, 2025)

23.7 BROCA: A 52.4-to-559.2mW Mobile Social Agent System-on-Chip with Adaptive Bit-Truncate Unit and Acoustic-Cluster Bit Grouping. - Wooyoung Jo; Seongyon Hong; Jiwon Choi; Beomseok Kwon; Haoyang Sang; Dongseok Im; Sangyeob Kim; Sangjin Kim; Taekwon Lee; Hoi-Jun Yoo (ISSCC, 2025)

Slim-Llama: A 4.69mW Large-Language-Model Processor with Binary/Ternary Weights for Billion-Parameter Llama Model. - Sangyeob Kim; Jungwan Lee; Hoi-Jun Yoo (ISSCC, 2025)

23.3 EdgeDiff: 418.4mJ/Inference Multi-Modal Few-Step Diffusion Model Accelerator with Mixed-Precision and Reordered Group Quantization. - Sangjin Kim; Jungjun Oh; Jeonggyu So; Yuseon Choi; Sangyeob Kim; Dongseok Im; Gwangtae Park; Hoi-Jun Yoo (ISSCC, 2025)

NeuGPU: An Energy-Efficient Neural Graphics Processing Unit for Instant Modeling and Real-Time Rendering on Mobile Devices. - Junha Ryu; Hankyul Kwon; Wonhoon Park; Zhiyong Li 016; Beomseok Kwon; Donghyeon Han; Dongseok Im; Sangyeob Kim; Hyungnam Joo; Minsung Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2025)

Dyamond: Compact and Efficient 1T1C DRAM IMC Accelerator With Bit Column Addition for Memory-Intensive AI. - Seongyon Hong; Wooyoung Jo; Sangjin Kim; Sangyeob Kim; Soyeon Um; Kyomin Sohn; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2025)

ED-MPIM: An Energy-Efficient Event-Driven Smart Vision SoC With High-Linearity and Reconfigurable MRAM PIM. - Wenao Xie; Haoyang Sang; Beomseok Kwon; Dongseok Im; Sangjin Kim; Sangyeob Kim; Kangho Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2025)