SAP: design of a systolic array processor for computation in vision. - Sanjay Nichani; N. Ranganathan (ICCD, 1990)

Corner detection. - Rajiv Mehrotra; Sanjay Nichani; Nagarajan Ranganathan (Pattern Recognit., 1990)

A VLSI architecture for a half-edge-based corner detector. - N. Ranganathan; Sanjay Nichani; Rajiv Mehrotra (Mach. Vis. Appl., 1991)

A VLSI hardware accelerator for dynamic time warping. - V. K. Sundaresan; Sanjay Nichani; N. Ranganathan; Ravi Sankar (ICPR (4), 1992)