Mathematically assisted adaptive body bias (ABB) for temperature compensation in gigascale LSI systems. - Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar (ASP-DAC, 2006)

An analytical model for negative bias temperature instability. - Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar (ICCAD, 2006)

Impact of NBTI on SRAM Read Stability and Design for Reliability. - Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar (ISQED, 2006)

NBTI-Aware Synthesis of Digital Circuits. - Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar (DAC, 2007)

A framework for block-based timing sensitivity analysis. - Sanjay V. Kumar; Chandramouli V. Kashyap; Sachin S. Sapatnekar (DAC, 2008)

Thermally Aware Design. - Yong Zhan; Sanjay V. Kumar; Sachin S. Sapatnekar (Found. Trends Electron. Des. Autom., 2008)

Body Bias Voltage Computations for Process and Temperature Compensation. - Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Adaptive techniques for overcoming performance degradation due to aging in digital circuits. - Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar (ASP-DAC, 2009)

Adaptive Techniques for Overcoming Performance Degradation Due to Aging in CMOS Circuits. - Sanjay V. Kumar; Chris H. Kim; Sachin S. Sapatnekar (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Circuit reliability: From Physics to Architectures: Embedded tutorial paper. - Jianxin Fang; Saket Gupta; Sanjay V. Kumar; Sravan K. Marella; Vivek Mishra; Pingqiang Zhou; Sachin S. Sapatnekar (ICCAD, 2012)

A holistic analysis of circuit timing variations in 3D-ICs with thermal and TSV-induced stress considerations. - Sravan K. Marella; Sanjay V. Kumar; Sachin S. Sapatnekar (ICCAD, 2012)