A 20-GHz and 46-GHz, 32x6-bit ROM for DDS Application in InP DHBT Technology. - Sanjeev Manandhar; Steven Eugene Turner; David E. Kotecki (ICECS, 2006)

36-GHz, 16×6-Bit ROM in InP DHBT Technology Suitable for DDS Application. - Sanjeev Manandhar; Steven Eugene Turner; David E. Kotecki (IEEE J. Solid State Circuits, 2007)

A 1.24 $ mu$ A Quiescent Current NMOS Low Dropout Regulator With Integrated Low-Power Oscillator-Driven Charge-Pump and Switched-Capacitor Pole Tracking Compensation. - Raveesh Magod; Bertan Bakkaloglu; Sanjeev Manandhar (IEEE J. Solid State Circuits, 2018)

32.5 A Scalable and PCB-Friendly Daisy-Chain Approach to Parallelize LDO Regulators with 2.613% Current-Sharing Accuracy Using Dynamic Element Matching for Integrated Current Sensing. - Bhushan Talele; Raveesh Magod; Keith Kunz; Sanjeev Manandhar; Bertan Bakkaloglu (ISSCC, 2020)

A 5.6 μ A Wide Bandwidth, High Power Supply Rejection Linear Low-Dropout Regulator With 68 dB of PSR Up To 2 MHz. - Kishan Joshi; Sanjeev Manandhar; Bertan Bakkaloglu (IEEE J. Solid State Circuits, 2020)