High-speed and low power unified dual-field multiplier in GF (P) and GF (2m). - Prabhat Chandra Shrivastava; Rupesh Kumar; Arvind Kumar; Sanjeev Rai (APCCAS, 2010)

Analytical surface potential modeling and simulation of junction-less double gate (JLDG) MOSFET for ultra low-power analog/RF circuits. - Nirmalya Roy; Abhinav Gupta; Sanjeev Rai (Microelectron. J., 2015)

Reliability analysis of Junction-less Double Gate (JLDG) MOSFET for analog/RF circuits for high linearity applications. - Abhinav Gupta; Sanjeev Rai (Microelectron. J., 2017)