ZEITGEIST: Database Support for Object-Oriented Programming. - Steve Ford; John Joseph; David E. Langworthy; David F. Lively; Girish Pathak; Edward R. Perez; Robert W. Peterson; Diana M. Sparacin; Satish M. Thatte; David L. Wells; Sanjive Agarwala (OODBS, 1988)

A Linear Time Algorithm for Timing Directed Circuit Optimizations. - Sanjive Agarwala; Patrick W. Bosshart (ISCAS, 1994)

A Multi-Level Memory System Architecture for High-Performance DSP Applications. - Sanjive Agarwala; Charles Fuoco; Tim Anderson; Dave Comisky; Christopher Mobley (ICCD, 2000)

Effective Hardware-Based Two-Way Loop Cache for High Performance Low Power Processors. - Tim Anderson; Sanjive Agarwala (ICCD, 2000)

A Scalable High-Performance DMA Architecture for DSP Applications. - Dave Comisky; Sanjive Agarwala; Charles Fuoco (ICCD, 2000)

A 600-MHz VLIW DSP. - Sanjive Agarwala; Timothy Anderson; Anthony M. Hill; M. D. Ales; Raguram Damodaran; Paul Wiley; Steven Mullinnix; J. Leach; Anthony Lell; Michael Gill; Arjun Rajagopal; Abhijeet Chachad; et al. (IEEE J. Solid State Circuits, 2002)

A 800 MHz System-on-Chip for Wireless Infrastructure Applications. - Sanjive Agarwala; Paul Wiley; Arjun Rajagopal; Anthony M. Hill; Raguram Damodaran; Lewis Nardini; Tim Anderson; Steven Mullinnix; Jose Flores; Heping Yue; Abhijeet Chachad; John Apostol; et al. (VLSI Design, 2004)

A 65nm C64x+ Multi-Core DSP Platform for Communications Infrastructure. - Sanjive Agarwala; Arjun Rajagopal; Anthony M. Hill; Mayur Joshi; Steven Mullinnix; Timothy Anderson; Raguram Damodaran; Lewis Nardini; Paul Wiley; Peter Groves; John Apostol; Michael Gill; et al. (ISSCC, 2007)

A 1.25GHz 0.8W C66x DSP Core in 40nm CMOS. - Raguram Damodaran; Timothy Anderson; Sanjive Agarwala; Rama Venkatasubramanian; Michael Gill; Dhileep Gopalakrishnan; Anthony M. Hill; Abhijeet Chachad; Dheera Balasubramanian; Naveen Bhoria; Jonathan Tran; Duc Bui; et al. (VLSI Design, 2012)

2.6 A 16nm 3.5B+ Transistor >14TOPS 2-to-10W Multicore SoC Platform for Automotive and Embedded Applications with Integrated Safety MCU, 512b Vector VLIW DSP, Embedded Vision and Imaging Acceleration. - Rama Venkatasubramanian; Don Steiss; Greg Shurtz; Tim Anderson; Kai Chirca; Raghavendra Santhanagopal; Niraj Nandan; Anish Reghunath; Hetul Sanghvi; Daniel Wu; Abhijeet Chachad; Brian Karguth; et al. (ISSCC, 2020)