Gate level representation of ECL circuits for fault modeling. - Sankaran M. Menon; Anura P. Jayasumana; Yashwant K. Malaiya (Great Lakes Symposium on VLSI, 1991)

Enhancement of resolution in supply current based testing for large ICs. - Yashwant K. Malaiya; Anura P. Jayasumana; Qiao Tong; Sankaran M. Menon (VTS, 1991)

On Bridging Faults in ECL Circuits. - Sankaran M. Menon; Anura P. Jayasumana; Yashwant K. Malaiya (VLSI Design, 1992)

Behavior of faulty single BJT BiCMOS logic gates. - Sankaran M. Menon; Yashwant K. Malaiya; Anura P. Jayasumana (VTS, 1992)

Test Generation for BiCMOS Circuits. - Sankaran M. Menon; Anura P. Jayasumana; Yashwant K. Malaiya (ISCAS, 1993)

Testable design for BiCMOS stuck-open fault detection. - Sankaran M. Menon; Anura P. Jayasumana; Yashwant K. Malaiya (VTS, 1993)

The Effect of Built-In Current Sensors (BICS) on Operational and Test Performance. - Sankaran M. Menon; Yashwant K. Malaiya; Anura P. Jayasumana; Carol Q. Tong (VLSI Design, 1994)

Input pattern classification for transistor level testing of BiCMOS circuits. - Sankaran M. Menon; Anura P. Jayasumana; Yashwant K. Malaiya (VTS, 1994)

Resolution Enhancement in IDDQ Testing for Large ICs. - Yashwant K. Malaiya; Anura P. Jayasumana; Carol Q. Tong; Sankaran M. Menon (VLSI Design, 1994)

A Novel High-Speed BiCMOS Domino Logic Family. - Anura P. Jayasumana; Yashwant K. Malaiya; Sankaran M. Menon (ISCAS, 1995)

Testable design of BiCMOS circuits for stuck-open fault detection using single patterns. - Sankaran M. Menon; Yashwant K. Malaiya; Anura P. Jayasumana; Rochit Rajsuman (IEEE J. Solid State Circuits, 1995)

Input Pattern Classification for Transistor Level Testing of Bridging Faults in BiCMOS Circuits. - Sankaran M. Menon; Anura P. Jayasumana; Yashwant K. Malaiya (Great Lakes Symposium on VLSI, 1996)

Fault Modeling of ECL for High Fault Coverage of Physical Defects. - Sankaran M. Menon; Yashwant K. Malaiya; Anura P. Jayasumana (VLSI Design, 1996)

Input Pattern Classification for Detection of Stuck-ON and Bridging Faults Using IDDQ Testing in BiCMOS and CMOS Circuits. - Sankaran M. Menon; Yashwant K. Malaiya; Anura P. Jayasumana (VLSI Design, 1997)

Operational and Test Performance in the Presence of Built-in Current Sensors. - Sankaran M. Menon; Yashwant K. Malaiya; Anura P. Jayasumana; Carol Q. Tong (VLSI Design, 1997)

Techniques for Debug of Low Power SoCs. - Sankaran M. Menon; Ashish Gupta; Chinna Prudvi; Rolf Kühnis; Sukhbinder Singh Takhar; Spencer K. Millican; Eric Rentschler; Pandy Kalimuthu; Preeti Ranjan Panda; Priyadarsan Patra (MTV, 2019)

Special Session: Closed Chassis Platform Debug of Compute Systems using the Functional Ubiquitous USB Type-C Receptacle. - Sankaran M. Menon; Rolf Kühnis (VTS, 2022)